ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages
This definition is backward compatible with MAV=1.0 as long as the guest does not set reserved bits in MAS1/MAS4. Also, fix the shift in booke206_tlb_to_page_size -- it's the base that should be able to hold a 4G page size, not the shift count. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -174,7 +174,7 @@ out:
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/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
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static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
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{
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return (ffs(size >> 10) - 1) >> 1;
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return ffs(size >> 10) - 1;
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}
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static void mmubooke_create_initial_mapping(CPUState *env,
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@ -667,8 +667,8 @@ enum {
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#define MAS0_ATSEL_TLB 0
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#define MAS0_ATSEL_LRAT MAS0_ATSEL
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#define MAS1_TSIZE_SHIFT 8
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#define MAS1_TSIZE_MASK (0xf << MAS1_TSIZE_SHIFT)
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#define MAS1_TSIZE_SHIFT 7
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#define MAS1_TSIZE_MASK (0x1f << MAS1_TSIZE_SHIFT)
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#define MAS1_TS_SHIFT 12
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#define MAS1_TS (1 << MAS1_TS_SHIFT)
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@ -1293,7 +1293,7 @@ target_phys_addr_t booke206_tlb_to_page_size(CPUState *env, ppcmas_tlb_t *tlb)
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{
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uint32_t tlbncfg;
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int tlbn = booke206_tlbm_to_tlbn(env, tlb);
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target_phys_addr_t tlbm_size;
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int tlbm_size;
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tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
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@ -1301,9 +1301,10 @@ target_phys_addr_t booke206_tlb_to_page_size(CPUState *env, ppcmas_tlb_t *tlb)
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tlbm_size = (tlb->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
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} else {
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tlbm_size = (tlbncfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT;
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tlbm_size <<= 1;
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}
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return (1 << (tlbm_size << 1)) << 10;
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return 1024ULL << tlbm_size;
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}
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/* TLB check function for MAS based SoftTLBs */
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