hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate device
The Exynos4210 SoC device currently uses a custom device "exynos4210.irq_gate" to model the OR gate that feeds each CPU's IRQ line. We have a standard TYPE_OR_IRQ device for this now, so use that instead. (This is a migration compatibility break, but that is OK for this machine type.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220404154658.565020-2-peter.maydell@linaro.org
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@ -205,7 +205,6 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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{
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Exynos4210State *s = EXYNOS4210_SOC(socdev);
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MemoryRegion *system_mem = get_system_memory();
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qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
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SysBusDevice *busdev;
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DeviceState *dev, *uart[4], *pl330[3];
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int i, n;
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@ -235,18 +234,13 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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/* IRQ Gate */
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for (i = 0; i < EXYNOS4210_NCPUS; i++) {
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dev = qdev_new("exynos4210.irq_gate");
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qdev_prop_set_uint32(dev, "n_in", EXYNOS4210_IRQ_GATE_NINPUTS);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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/* Get IRQ Gate input in gate_irq */
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for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) {
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gate_irq[i][n] = qdev_get_gpio_in(dev, n);
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}
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busdev = SYS_BUS_DEVICE(dev);
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/* Connect IRQ Gate output to CPU's IRQ line */
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sysbus_connect_irq(busdev, 0,
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qdev_get_gpio_in(DEVICE(s->cpu[i]), ARM_CPU_IRQ));
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DeviceState *orgate = DEVICE(&s->cpu_irq_orgate[i]);
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object_property_set_int(OBJECT(orgate), "num-lines",
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EXYNOS4210_IRQ_GATE_NINPUTS,
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&error_abort);
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qdev_realize(orgate, NULL, &error_abort);
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qdev_connect_gpio_out(orgate, 0,
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qdev_get_gpio_in(DEVICE(s->cpu[i]), ARM_CPU_IRQ));
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}
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/* Private memory region and Internal GIC */
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@ -256,7 +250,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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sysbus_realize_and_unref(busdev, &error_fatal);
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sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR);
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for (n = 0; n < EXYNOS4210_NCPUS; n++) {
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sysbus_connect_irq(busdev, n, gate_irq[n][0]);
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sysbus_connect_irq(busdev, n,
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qdev_get_gpio_in(DEVICE(&s->cpu_irq_orgate[n]), 0));
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}
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for (n = 0; n < EXYNOS4210_INT_GIC_NIRQ; n++) {
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s->irqs.int_gic_irq[n] = qdev_get_gpio_in(dev, n);
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@ -275,7 +270,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
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/* Map Distributer interface */
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sysbus_mmio_map(busdev, 1, EXYNOS4210_EXT_GIC_DIST_BASE_ADDR);
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for (n = 0; n < EXYNOS4210_NCPUS; n++) {
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sysbus_connect_irq(busdev, n, gate_irq[n][1]);
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sysbus_connect_irq(busdev, n,
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qdev_get_gpio_in(DEVICE(&s->cpu_irq_orgate[n]), 1));
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}
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for (n = 0; n < EXYNOS4210_EXT_GIC_NIRQ; n++) {
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s->irqs.ext_gic_irq[n] = qdev_get_gpio_in(dev, n);
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@ -488,6 +484,11 @@ static void exynos4210_init(Object *obj)
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object_initialize_child(obj, name, orgate, TYPE_OR_IRQ);
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g_free(name);
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}
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for (i = 0; i < ARRAY_SIZE(s->cpu_irq_orgate); i++) {
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g_autofree char *name = g_strdup_printf("cpu-irq-orgate%d", i);
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object_initialize_child(obj, name, &s->cpu_irq_orgate[i], TYPE_OR_IRQ);
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}
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}
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static void exynos4210_class_init(ObjectClass *klass, void *data)
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@ -102,6 +102,7 @@ struct Exynos4210State {
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MemoryRegion bootreg_mem;
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I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
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qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA];
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qemu_or_irq cpu_irq_orgate[EXYNOS4210_NCPUS];
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};
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#define TYPE_EXYNOS4210_SOC "exynos4210"
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