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target/ppc: Change ppcemb_tlb_check() to return bool

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Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <bacd1bcbe99c07930c29a9815915da9ac75f6920.1685448535.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
BALATON Zoltan 2023-05-30 15:28:12 +02:00 committed by Daniel Henrique Barboza
parent bb60364c20
commit 2b23daa8eb
1 changed files with 13 additions and 13 deletions
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26
target/ppc/mmu_common.c
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@ -489,15 +489,15 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
} }
/* Generic TLB check function for embedded PowerPC implementations */ /* Generic TLB check function for embedded PowerPC implementations */
static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, static bool ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
hwaddr *raddrp, hwaddr *raddrp,
target_ulong address, uint32_t pid, int i) target_ulong address, uint32_t pid, int i)
{ {
target_ulong mask; target_ulong mask;
/* Check valid flag */ /* Check valid flag */
if (!(tlb->prot & PAGE_VALID)) { if (!(tlb->prot & PAGE_VALID)) {
return -1; return false;
} }
mask = ~(tlb->size - 1); mask = ~(tlb->size - 1);
qemu_log_mask(CPU_LOG_MMU, "%s: TLB %d address " TARGET_FMT_lx qemu_log_mask(CPU_LOG_MMU, "%s: TLB %d address " TARGET_FMT_lx
@ -506,14 +506,14 @@ static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
mask, (uint32_t)tlb->PID, tlb->prot); mask, (uint32_t)tlb->PID, tlb->prot);
/* Check PID */ /* Check PID */
if (tlb->PID != 0 && tlb->PID != pid) { if (tlb->PID != 0 && tlb->PID != pid) {
return -1; return false;
} }
/* Check effective address */ /* Check effective address */
if ((address & mask) != tlb->EPN) { if ((address & mask) != tlb->EPN) {
return -1; return false;
} }
*raddrp = (tlb->RPN & mask) | (address & ~mask); *raddrp = (tlb->RPN & mask) | (address & ~mask);
return 0; return true;
} }
/* Generic TLB search function for PowerPC embedded implementations */ /* Generic TLB search function for PowerPC embedded implementations */
@ -525,7 +525,7 @@ int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid)
for (i = 0; i < env->nb_tlb; i++) { for (i = 0; i < env->nb_tlb; i++) {
tlb = &env->tlb.tlbe[i]; tlb = &env->tlb.tlbe[i];
if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) { if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i)) {
return i; return i;
} }
} }
@ -545,8 +545,8 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
pr = FIELD_EX64(env->msr, MSR, PR); pr = FIELD_EX64(env->msr, MSR, PR);
for (i = 0; i < env->nb_tlb; i++) { for (i = 0; i < env->nb_tlb; i++) {
tlb = &env->tlb.tlbe[i]; tlb = &env->tlb.tlbe[i];
if (ppcemb_tlb_check(env, tlb, &raddr, address, if (!ppcemb_tlb_check(env, tlb, &raddr, address,
env->spr[SPR_40x_PID], i) < 0) { env->spr[SPR_40x_PID], i)) {
continue; continue;
} }
zsel = (tlb->attr >> 4) & 0xF; zsel = (tlb->attr >> 4) & 0xF;
@ -608,7 +608,7 @@ static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
int prot2; int prot2;
if (ppcemb_tlb_check(env, tlb, raddr, address, if (ppcemb_tlb_check(env, tlb, raddr, address,
env->spr[SPR_BOOKE_PID], i) >= 0) { env->spr[SPR_BOOKE_PID], i)) {
if (!env->nb_pids) { if (!env->nb_pids) {
/* Extend the physical address to 36 bits */ /* Extend the physical address to 36 bits */
*raddr |= (uint64_t)(tlb->RPN & 0xF) << 32; *raddr |= (uint64_t)(tlb->RPN & 0xF) << 32;
@ -618,13 +618,13 @@ static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
if (env->spr[SPR_BOOKE_PID1] && if (env->spr[SPR_BOOKE_PID1] &&
ppcemb_tlb_check(env, tlb, raddr, address, ppcemb_tlb_check(env, tlb, raddr, address,
env->spr[SPR_BOOKE_PID1], i) >= 0) { env->spr[SPR_BOOKE_PID1], i)) {
goto found_tlb; goto found_tlb;
} }
if (env->spr[SPR_BOOKE_PID2] && if (env->spr[SPR_BOOKE_PID2] &&
ppcemb_tlb_check(env, tlb, raddr, address, ppcemb_tlb_check(env, tlb, raddr, address,
env->spr[SPR_BOOKE_PID2], i) >= 0) { env->spr[SPR_BOOKE_PID2], i)) {
goto found_tlb; goto found_tlb;
} }