mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Memory-mapped interface for VGA, by Herve Poussineau.

Browse Source 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2740 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-04-29 01:47:26 +00:00
parent 509b8ab2cc
commit 2abec30bcf
4 changed files with 109 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
hw/mips_pica61.c
View File

@ -166,7 +166,10 @@ void mips_pica61_init (int ram_size, int vga_ram_size, int boot_device,
ds1225y_init(0x80009000, "nvram");
/* Video card */
//isa_vga_init(ds, phys_ram_base + ram_size, ram_size, vga_ram_size);
/* FIXME: This card is not the real one which was in the original PICA,
* but let's do with what Qemu currenly emulates... */
isa_vga_mm_init(ds, phys_ram_base + ram_size, ram_size, vga_ram_size,
0x40000000, 0x60000000, 0);
}
QEMUMachine mips_pica61_machine = {

99
hw/vga.c
View File

@ -1845,6 +1845,81 @@ void vga_init(VGAState *s)
vga_io_memory);
}
/* Memory mapped interface */
static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
{
VGAState *s = opaque;
return vga_ioport_read(s, (addr - s->base_ctrl) >> s->it_shift) & 0xff;
}
static void vga_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
VGAState *s = opaque;
vga_ioport_write(s, (addr - s->base_ctrl) >> s->it_shift, value & 0xff);
}
static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
{
VGAState *s = opaque;
return vga_ioport_read(s, (addr - s->base_ctrl) >> s->it_shift) & 0xffff;
}
static void vga_mm_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
VGAState *s = opaque;
vga_ioport_write(s, (addr - s->base_ctrl) >> s->it_shift, value & 0xffff);
}
static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
{
VGAState *s = opaque;
return vga_ioport_read(s, (addr - s->base_ctrl) >> s->it_shift);
}
static void vga_mm_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
VGAState *s = opaque;
vga_ioport_write(s, (addr - s->base_ctrl) >> s->it_shift, value);
}
static CPUReadMemoryFunc *vga_mm_read_ctrl[] = {
&vga_mm_readb,
&vga_mm_readw,
&vga_mm_readl,
};
static CPUWriteMemoryFunc *vga_mm_write_ctrl[] = {
&vga_mm_writeb,
&vga_mm_writew,
&vga_mm_writel,
};
static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
target_phys_addr_t ctrl_base, int it_shift)
{
int s_ioport_ctrl, vga_io_memory;
s->base_ctrl = ctrl_base;
s->it_shift = it_shift;
s_ioport_ctrl = cpu_register_io_memory(0, vga_mm_read_ctrl, vga_mm_write_ctrl, s);
vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write, s);
register_savevm("vga", 0, 2, vga_save, vga_load, s);
cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl);
s->bank_offset = 0;
cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory);
}
int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
{
@ -1867,6 +1942,30 @@ int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
return 0;
}
int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
int it_shift)
{
VGAState *s;
s = qemu_mallocz(sizeof(VGAState));
if (!s)
return -1;
vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
vga_mm_init(s, vram_base, ctrl_base, it_shift);
graphic_console_init(s->ds, s->update, s->invalidate, s->screen_dump, s);
#ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
vga_ram_size, vga_ram_offset);
#endif
return 0;
}
int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
unsigned long vga_bios_offset, int vga_bios_size)

2
hw/vga_int.h
View File

@ -85,6 +85,8 @@
unsigned int vram_size; \
unsigned long bios_offset; \
unsigned int bios_size; \
target_phys_addr_t base_ctrl; \
int it_shift; \
PCIDevice *pci_dev; \
uint32_t latch; \
uint8_t sr_index; \

4
vl.h
View File

@ -931,6 +931,10 @@ int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
unsigned long vga_bios_offset, int vga_bios_size);
int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
int it_shift);
/* cirrus_vga.c */
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,