Sparc64: handle MMU global bit and nucleus context
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -277,10 +277,12 @@ enum {
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#define TTE_VALID_BIT (1ULL << 63)
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#define TTE_USED_BIT (1ULL << 41)
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#define TTE_LOCKED_BIT (1ULL << 6)
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#define TTE_GLOBAL_BIT (1ULL << 0)
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#define TTE_IS_VALID(tte) ((tte) & TTE_VALID_BIT)
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#define TTE_IS_USED(tte) ((tte) & TTE_USED_BIT)
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#define TTE_IS_LOCKED(tte) ((tte) & TTE_LOCKED_BIT)
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#define TTE_IS_GLOBAL(tte) ((tte) & TTE_GLOBAL_BIT)
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#define TTE_SET_USED(tte) ((tte) |= TTE_USED_BIT)
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#define TTE_SET_UNUSED(tte) ((tte) &= ~TTE_USED_BIT)
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@ -388,7 +388,8 @@ static inline int compare_masked(uint64_t x, uint64_t y, uint64_t mask)
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// requires virtual address mask value calculated from TTE entry size
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static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
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uint64_t address, uint64_t context,
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target_phys_addr_t *physical)
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target_phys_addr_t *physical,
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int is_nucleus)
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{
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uint64_t mask;
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@ -410,8 +411,9 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
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// valid, context match, virtual address match?
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if (TTE_IS_VALID(tlb->tte) &&
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compare_masked(context, tlb->tag, 0x1fff) &&
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compare_masked(address, tlb->tag, mask))
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((is_nucleus && compare_masked(0, tlb->tag, 0x1fff))
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|| TTE_IS_GLOBAL(tlb->tte) || compare_masked(context, tlb->tag, 0x1fff))
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&& compare_masked(address, tlb->tag, mask))
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{
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// decode physical address
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*physical = ((tlb->tte & mask) | (address & ~mask)) & 0x1ffffffe000ULL;
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@ -427,6 +429,7 @@ static int get_physical_address_data(CPUState *env,
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{
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unsigned int i;
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uint64_t context;
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int is_nucleus;
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if ((env->lsu & DMMU_E) == 0) { /* DMMU disabled */
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*physical = ultrasparc_truncate_physical(address);
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@ -435,12 +438,13 @@ static int get_physical_address_data(CPUState *env,
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}
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context = env->dmmu.mmu_primary_context & 0x1fff;
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is_nucleus = env->tl > 0;
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for (i = 0; i < 64; i++) {
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// ctx match, vaddr match, valid?
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if (ultrasparc_tag_match(&env->dtlb[i],
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address, context, physical)
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) {
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address, context, physical,
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is_nucleus)) {
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// access ok?
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if (((env->dtlb[i].tte & 0x4) && is_user) ||
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(!(env->dtlb[i].tte & 0x2) && (rw == 1))) {
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@ -486,6 +490,7 @@ static int get_physical_address_code(CPUState *env,
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{
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unsigned int i;
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uint64_t context;
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int is_nucleus;
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if ((env->lsu & IMMU_E) == 0 || (env->pstate & PS_RED) != 0) {
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/* IMMU disabled */
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@ -495,12 +500,13 @@ static int get_physical_address_code(CPUState *env,
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}
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context = env->dmmu.mmu_primary_context & 0x1fff;
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is_nucleus = env->tl > 0;
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for (i = 0; i < 64; i++) {
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// ctx match, vaddr match, valid?
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if (ultrasparc_tag_match(&env->itlb[i],
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address, context, physical)
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) {
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address, context, physical,
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is_nucleus)) {
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// access ok?
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if ((env->itlb[i].tte & 0x4) && is_user) {
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if (env->immu.sfsr) /* Fault status register */
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@ -596,7 +602,7 @@ void dump_mmu(CPUState *env)
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}
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if ((env->dtlb[i].tte & 0x8000000000000000ULL) != 0) {
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printf("[%02u] VA: %" PRIx64 ", PA: %" PRIx64
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", %s, %s, %s, %s, ctx %" PRId64 "\n",
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", %s, %s, %s, %s, ctx %" PRId64 " %s\n",
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i,
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env->dtlb[i].tag & (uint64_t)~0x1fffULL,
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env->dtlb[i].tte & (uint64_t)0x1ffffffe000ULL,
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@ -604,7 +610,8 @@ void dump_mmu(CPUState *env)
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env->dtlb[i].tte & 0x4? "priv": "user",
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env->dtlb[i].tte & 0x2? "RW": "RO",
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env->dtlb[i].tte & 0x40? "locked": "unlocked",
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env->dtlb[i].tag & (uint64_t)0x1fffULL);
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env->dtlb[i].tag & (uint64_t)0x1fffULL,
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TTE_IS_GLOBAL(env->dtlb[i].tag)? "global" : "local");
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}
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}
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}
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@ -630,14 +637,15 @@ void dump_mmu(CPUState *env)
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}
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if ((env->itlb[i].tte & 0x8000000000000000ULL) != 0) {
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printf("[%02u] VA: %" PRIx64 ", PA: %" PRIx64
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", %s, %s, %s, ctx %" PRId64 "\n",
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", %s, %s, %s, ctx %" PRId64 " %s\n",
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i,
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env->itlb[i].tag & (uint64_t)~0x1fffULL,
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env->itlb[i].tte & (uint64_t)0x1ffffffe000ULL,
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mask,
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env->itlb[i].tte & 0x4? "priv": "user",
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env->itlb[i].tte & 0x40? "locked": "unlocked",
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env->itlb[i].tag & (uint64_t)0x1fffULL);
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env->itlb[i].tag & (uint64_t)0x1fffULL,
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TTE_IS_GLOBAL(env->itlb[i].tag)? "global" : "local");
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}
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}
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}
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