hw/net: add simple phy support to mcf_fec driver
The Linux fec driver needs at least basic phy support to probe and work. The current qemu mcf_fec emulation has no support for the reading or writing of the MDIO lines to access an attached phy. This code adds a very simple set of register results for a fixed phy setup - very similar to that used on an m5208evb board. This is enough to probe and identify an emulated attached phy. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435296436-12152-4-git-send-email-gerg@uclinux.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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@ -8,6 +8,7 @@
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#include "hw/hw.h"
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#include "net/net.h"
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#include "hw/m68k/mcf.h"
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#include "hw/net/mii.h"
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/* For crc32 */
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#include <zlib.h>
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#include "exec/address-spaces.h"
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@ -216,6 +217,51 @@ static void mcf_fec_reset(mcf_fec_state *s)
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s->rfsr = 0x500;
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}
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#define MMFR_WRITE_OP (1 << 28)
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#define MMFR_READ_OP (2 << 28)
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#define MMFR_PHYADDR(v) (((v) >> 23) & 0x1f)
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#define MMFR_REGNUM(v) (((v) >> 18) & 0x1f)
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static uint64_t mcf_fec_read_mdio(mcf_fec_state *s)
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{
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uint64_t v;
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if (s->mmfr & MMFR_WRITE_OP)
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return s->mmfr;
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if (MMFR_PHYADDR(s->mmfr) != 1)
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return s->mmfr |= 0xffff;
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switch (MMFR_REGNUM(s->mmfr)) {
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case MII_BMCR:
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v = MII_BMCR_SPEED | MII_BMCR_AUTOEN | MII_BMCR_FD;
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break;
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case MII_BMSR:
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v = MII_BMSR_100TX_FD | MII_BMSR_100TX_HD | MII_BMSR_10T_FD |
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MII_BMSR_10T_HD | MII_BMSR_MFPS | MII_BMSR_AN_COMP |
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MII_BMSR_AUTONEG | MII_BMSR_LINK_ST;
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break;
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case MII_PHYID1:
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v = DP83848_PHYID1;
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break;
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case MII_PHYID2:
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v = DP83848_PHYID2;
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break;
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case MII_ANAR:
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v = MII_ANAR_TXFD | MII_ANAR_TX | MII_ANAR_10FD |
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MII_ANAR_10 | MII_ANAR_CSMACD;
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break;
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case MII_ANLPAR:
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v = MII_ANLPAR_ACK | MII_ANLPAR_TXFD | MII_ANLPAR_TX |
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MII_ANLPAR_10FD | MII_ANLPAR_10 | MII_ANLPAR_CSMACD;
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break;
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default:
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v = 0xffff;
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break;
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}
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s->mmfr = (s->mmfr & ~0xffff) | v;
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return s->mmfr;
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}
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static uint64_t mcf_fec_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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@ -226,7 +272,7 @@ static uint64_t mcf_fec_read(void *opaque, hwaddr addr,
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case 0x010: return s->rx_enabled ? (1 << 24) : 0; /* RDAR */
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case 0x014: return 0; /* TDAR */
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case 0x024: return s->ecr;
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case 0x040: return s->mmfr;
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case 0x040: return mcf_fec_read_mdio(s);
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case 0x044: return s->mscr;
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case 0x064: return 0; /* MIBC */
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case 0x084: return s->rcr;
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@ -287,8 +333,8 @@ static void mcf_fec_write(void *opaque, hwaddr addr,
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}
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break;
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case 0x040:
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/* TODO: Implement MII. */
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s->mmfr = value;
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s->eir |= FEC_INT_MII;
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break;
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case 0x044:
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s->mscr = value & 0xfe;
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@ -65,7 +65,12 @@
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#define MII_ANLPAR_CSMACD (1 << 0)
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/* List of vendor identifiers */
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/* RealTek 8201 */
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#define RTL8201CP_PHYID1 0x0000
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#define RTL8201CP_PHYID2 0x8201
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/* National Semiconductor DP83848 */
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#define DP83848_PHYID1 0x2000
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#define DP83848_PHYID2 0x5c90
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#endif /* MII_H */
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