added LAR/LSL tests
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@152 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -707,6 +707,19 @@ uint8_t seg_data2[4096];
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#define MK_SEL(n) (((n) << 3) | 7)
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#define TEST_LR(op, size, seg, mask)\
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{\
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int res, res2;\
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res = 0x12345678;\
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asm (op " %" size "2, %" size "0\n" \
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"movl $0, %1\n"\
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"jnz 1f\n"\
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"movl $1, %1\n"\
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"1:\n"\
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: "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
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printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
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}
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/* NOTE: we use Linux modify_ldt syscall */
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void test_segs(void)
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{
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@ -784,6 +797,16 @@ void test_segs(void)
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: "=r" (res), "=g" (res2)
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: "m" (segoff));
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printf("FS:reg = %04x:%08x\n", res2, res);
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TEST_LR("larw", "w", MK_SEL(2), 0x0100);
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TEST_LR("larl", "", MK_SEL(2), 0x0100);
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TEST_LR("lslw", "w", MK_SEL(2), 0);
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TEST_LR("lsll", "", MK_SEL(2), 0);
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TEST_LR("larw", "w", 0xfff8, 0);
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TEST_LR("larl", "", 0xfff8, 0);
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TEST_LR("lslw", "w", 0xfff8, 0);
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TEST_LR("lsll", "", 0xfff8, 0);
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}
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/* 16 bit code test */
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