target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Use the VFP_BINOP macro to provide helpers for min, max, minnum and maxnum, rather than hand-rolling them. (The float64 max version is not used by A32 but will be needed for A64.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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@ -3864,6 +3864,10 @@ VFP_BINOP(add)
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VFP_BINOP(sub)
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VFP_BINOP(mul)
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VFP_BINOP(div)
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VFP_BINOP(min)
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VFP_BINOP(max)
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VFP_BINOP(minnum)
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VFP_BINOP(maxnum)
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#undef VFP_BINOP
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float32 VFP_HELPER(neg, s)(float32 a)
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@ -4317,28 +4321,3 @@ float64 VFP_HELPER(muladd, d)(float64 a, float64 b, float64 c, void *fpstp)
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float_status *fpst = fpstp;
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return float64_muladd(a, b, c, 0, fpst);
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}
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/* ARMv8 VMAXNM/VMINNM */
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float32 VFP_HELPER(maxnm, s)(float32 a, float32 b, void *fpstp)
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{
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float_status *fpst = fpstp;
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return float32_maxnum(a, b, fpst);
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}
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float64 VFP_HELPER(maxnm, d)(float64 a, float64 b, void *fpstp)
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{
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float_status *fpst = fpstp;
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return float64_maxnum(a, b, fpst);
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}
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float32 VFP_HELPER(minnm, s)(float32 a, float32 b, void *fpstp)
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{
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float_status *fpst = fpstp;
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return float32_minnum(a, b, fpst);
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}
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float64 VFP_HELPER(minnm, d)(float64 a, float64 b, void *fpstp)
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{
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float_status *fpst = fpstp;
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return float64_minnum(a, b, fpst);
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}
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@ -79,6 +79,14 @@ DEF_HELPER_3(vfp_muls, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_muld, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_divs, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_divd, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_maxs, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_maxd, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_mins, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_mind, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_maxnums, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_maxnumd, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_minnums, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_minnumd, f64, f64, f64, ptr)
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DEF_HELPER_1(vfp_negs, f32, f32)
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DEF_HELPER_1(vfp_negd, f64, f64)
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DEF_HELPER_1(vfp_abss, f32, f32)
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@ -132,11 +140,6 @@ DEF_HELPER_2(neon_fcvt_f32_to_f16, i32, f32, env)
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DEF_HELPER_4(vfp_muladdd, f64, f64, f64, f64, ptr)
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DEF_HELPER_4(vfp_muladds, f32, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_maxnmd, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_maxnms, f32, f32, f32, ptr)
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DEF_HELPER_3(vfp_minnmd, f64, f64, f64, ptr)
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DEF_HELPER_3(vfp_minnms, f32, f32, f32, ptr)
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DEF_HELPER_3(recps_f32, f32, f32, f32, env)
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DEF_HELPER_3(rsqrts_f32, f32, f32, f32, env)
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DEF_HELPER_2(recpe_f32, f32, f32, env)
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@ -346,8 +349,6 @@ DEF_HELPER_2(neon_qneg_s8, i32, env, i32)
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DEF_HELPER_2(neon_qneg_s16, i32, env, i32)
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DEF_HELPER_2(neon_qneg_s32, i32, env, i32)
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DEF_HELPER_3(neon_min_f32, i32, i32, i32, ptr)
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DEF_HELPER_3(neon_max_f32, i32, i32, i32, ptr)
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DEF_HELPER_3(neon_abd_f32, i32, i32, i32, ptr)
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DEF_HELPER_3(neon_ceq_f32, i32, i32, i32, ptr)
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DEF_HELPER_3(neon_cge_f32, i32, i32, i32, ptr)
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@ -1765,18 +1765,6 @@ uint32_t HELPER(neon_qneg_s32)(CPUARMState *env, uint32_t x)
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}
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/* NEON Float helpers. */
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uint32_t HELPER(neon_min_f32)(uint32_t a, uint32_t b, void *fpstp)
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{
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float_status *fpst = fpstp;
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return float32_val(float32_min(make_float32(a), make_float32(b), fpst));
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}
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uint32_t HELPER(neon_max_f32)(uint32_t a, uint32_t b, void *fpstp)
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{
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float_status *fpst = fpstp;
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return float32_val(float32_max(make_float32(a), make_float32(b), fpst));
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}
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uint32_t HELPER(neon_abd_f32)(uint32_t a, uint32_t b, void *fpstp)
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{
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float_status *fpst = fpstp;
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@ -2725,9 +2725,9 @@ static int handle_vminmaxnm(uint32_t insn, uint32_t rd, uint32_t rn,
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tcg_gen_ld_f64(frn, cpu_env, vfp_reg_offset(dp, rn));
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tcg_gen_ld_f64(frm, cpu_env, vfp_reg_offset(dp, rm));
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if (vmin) {
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gen_helper_vfp_minnmd(dest, frn, frm, fpst);
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gen_helper_vfp_minnumd(dest, frn, frm, fpst);
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} else {
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gen_helper_vfp_maxnmd(dest, frn, frm, fpst);
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gen_helper_vfp_maxnumd(dest, frn, frm, fpst);
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}
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tcg_gen_st_f64(dest, cpu_env, vfp_reg_offset(dp, rd));
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tcg_temp_free_i64(frn);
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@ -2743,9 +2743,9 @@ static int handle_vminmaxnm(uint32_t insn, uint32_t rd, uint32_t rn,
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tcg_gen_ld_f32(frn, cpu_env, vfp_reg_offset(dp, rn));
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tcg_gen_ld_f32(frm, cpu_env, vfp_reg_offset(dp, rm));
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if (vmin) {
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gen_helper_vfp_minnms(dest, frn, frm, fpst);
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gen_helper_vfp_minnums(dest, frn, frm, fpst);
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} else {
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gen_helper_vfp_maxnms(dest, frn, frm, fpst);
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gen_helper_vfp_maxnums(dest, frn, frm, fpst);
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}
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tcg_gen_st_f32(dest, cpu_env, vfp_reg_offset(dp, rd));
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tcg_temp_free_i32(frn);
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@ -5121,9 +5121,9 @@ static int disas_neon_data_insn(CPUARMState * env, DisasContext *s, uint32_t ins
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{
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TCGv_ptr fpstatus = get_fpstatus_ptr(1);
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if (size == 0) {
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gen_helper_neon_max_f32(tmp, tmp, tmp2, fpstatus);
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gen_helper_vfp_maxs(tmp, tmp, tmp2, fpstatus);
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} else {
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gen_helper_neon_min_f32(tmp, tmp, tmp2, fpstatus);
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gen_helper_vfp_mins(tmp, tmp, tmp2, fpstatus);
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}
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tcg_temp_free_ptr(fpstatus);
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break;
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@ -5133,9 +5133,9 @@ static int disas_neon_data_insn(CPUARMState * env, DisasContext *s, uint32_t ins
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/* VMAXNM/VMINNM */
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TCGv_ptr fpstatus = get_fpstatus_ptr(1);
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if (size == 0) {
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gen_helper_vfp_maxnms(tmp, tmp, tmp2, fpstatus);
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gen_helper_vfp_maxnums(tmp, tmp, tmp2, fpstatus);
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} else {
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gen_helper_vfp_minnms(tmp, tmp, tmp2, fpstatus);
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gen_helper_vfp_minnums(tmp, tmp, tmp2, fpstatus);
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}
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tcg_temp_free_ptr(fpstatus);
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} else {
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