hw/virtio: fix Power Management Control Register for PCI Express virtio devices
Make Power Management State flag writable to conform with the PCI Express spec. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -1812,6 +1812,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
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pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
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pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
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assert(pos > 0);
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assert(pos > 0);
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pci_dev->exp.pm_cap = pos;
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/*
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/*
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* Indicates that this function complies with revision 1.2 of the
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* Indicates that this function complies with revision 1.2 of the
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@ -1829,6 +1830,12 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
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pcie_cap_lnkctl_init(pci_dev);
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pcie_cap_lnkctl_init(pci_dev);
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}
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}
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if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
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/* Init Power Management Control Register */
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pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
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PCI_PM_CTRL_STATE_MASK);
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}
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if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
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if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
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pcie_ats_init(pci_dev, 256);
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pcie_ats_init(pci_dev, 256);
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}
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}
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@ -1877,6 +1884,8 @@ static void virtio_pci_reset(DeviceState *qdev)
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if (pci_is_express(dev)) {
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if (pci_is_express(dev)) {
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pcie_cap_deverr_reset(dev);
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pcie_cap_deverr_reset(dev);
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pcie_cap_lnkctl_reset(dev);
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pcie_cap_lnkctl_reset(dev);
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pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
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}
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}
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}
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}
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@ -1902,6 +1911,8 @@ static Property virtio_pci_properties[] = {
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
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DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
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DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
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DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -75,6 +75,7 @@ enum {
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VIRTIO_PCI_FLAG_ATS_BIT,
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VIRTIO_PCI_FLAG_ATS_BIT,
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
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VIRTIO_PCI_FLAG_INIT_PM_BIT,
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};
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};
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/* Need to activate work-arounds for buggy guests at vmstate load. */
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/* Need to activate work-arounds for buggy guests at vmstate load. */
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@ -108,6 +109,9 @@ enum {
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/* Init Link Control register */
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/* Init Link Control register */
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#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT)
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#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT)
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/* Init Power Management */
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#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT)
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typedef struct {
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typedef struct {
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MSIMessage msg;
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MSIMessage msg;
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int virq;
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int virq;
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@ -30,6 +30,10 @@
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.driver = "virtio-pci",\
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.driver = "virtio-pci",\
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.property = "x-pcie-lnkctl-init",\
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.property = "x-pcie-lnkctl-init",\
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.value = "off",\
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.value = "off",\
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},{\
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.driver = "virtio-pci",\
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.property = "x-pcie-pm-init",\
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.value = "off",\
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},
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},
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#define HW_COMPAT_2_7 \
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#define HW_COMPAT_2_7 \
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@ -63,6 +63,8 @@ typedef enum {
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struct PCIExpressDevice {
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struct PCIExpressDevice {
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/* Offset of express capability in config space */
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/* Offset of express capability in config space */
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uint8_t exp_cap;
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uint8_t exp_cap;
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/* Offset of Power Management capability in config space */
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uint8_t pm_cap;
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/* SLOT */
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/* SLOT */
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bool hpev_notified; /* Logical AND of conditions for hot plug event.
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bool hpev_notified; /* Logical AND of conditions for hot plug event.
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