From 2736fc61811d80309d6fb0bbbb2af1bbe12e44b7 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 12 May 2021 15:54:16 -0300 Subject: [PATCH] target/ppc: Simplify gen_debug_exception Two of the call sites that use gen_debug_exception have already updated NIP. Only ppc_tr_breakpoint_check requires the update. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 9626bea9d5..5590a93ad5 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -329,19 +329,7 @@ static uint32_t gen_prep_dbgex(DisasContext *ctx) static void gen_debug_exception(DisasContext *ctx) { - TCGv_i32 t0; - - /* - * These are all synchronous exceptions, we set the PC back to the - * faulting instruction - */ - if ((ctx->exception != POWERPC_EXCP_BRANCH) && - (ctx->exception != POWERPC_EXCP_SYNC)) { - gen_update_nip(ctx, ctx->base.pc_next); - } - t0 = tcg_const_i32(EXCP_DEBUG); - gen_helper_raise_exception(cpu_env, t0); - tcg_temp_free_i32(t0); + gen_helper_raise_exception(cpu_env, tcg_constant_i32(EXCP_DEBUG)); ctx->base.is_jmp = DISAS_NORETURN; } @@ -9186,6 +9174,7 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, { DisasContext *ctx = container_of(dcbase, DisasContext, base); + gen_update_nip(ctx, ctx->base.pc_next); gen_debug_exception(ctx); /* * The address covered by the breakpoint must be included in