target/arm: support reading of CNT[VCT|FRQ]_EL0 from user-space
Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0 trap..), released in kernel version v4.12, user-space has been able to read these system registers. As we can't use QEMUTimer's in linux-user mode we just directly call cpu_get_clock(). Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180625160009.17437-2-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -2167,11 +2167,32 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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};
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#else
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/* In user-mode none of the generic timer registers are accessible,
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* and their implementation depends on QEMU_CLOCK_VIRTUAL and qdev gpio outputs,
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* so instead just don't register any of them.
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/* In user-mode most of the generic timer registers are inaccessible
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* however modern kernels (4.12+) allow access to cntvct_el0
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*/
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static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)
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{
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/* Currently we have no support for QEMUTimer in linux-user so we
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* can't call gt_get_countervalue(env), instead we directly
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* call the lower level functions.
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*/
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return cpu_get_clock() / GTIMER_SCALE;
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}
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static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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{ .name = "CNTFRQ_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 0,
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.type = ARM_CP_CONST, .access = PL0_R /* no PL1_RW in linux-user */,
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.fieldoffset = offsetof(CPUARMState, cp15.c14_cntfrq),
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.resetvalue = NANOSECONDS_PER_SECOND / GTIMER_SCALE,
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},
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{ .name = "CNTVCT_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 2,
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.access = PL0_R, .type = ARM_CP_NO_RAW | ARM_CP_IO,
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.readfn = gt_virt_cnt_read,
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},
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REGINFO_SENTINEL
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};
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