tcg-arm: Define TCG_TARGET_INSN_UNIT_SIZE
And use tcg pointer differencing functions as appropriate. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
abce5964be
commit
267c931985
@ -115,36 +115,18 @@ static const int tcg_target_call_oarg_regs[2] = {
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#define TCG_REG_TMP TCG_REG_R12
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static inline void reloc_abs32(void *code_ptr, intptr_t target)
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static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
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{
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*(uint32_t *) code_ptr = target;
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ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2;
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*code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
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}
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static inline void reloc_pc24(void *code_ptr, intptr_t target)
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{
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uint32_t offset = ((target - ((intptr_t)code_ptr + 8)) >> 2);
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*(uint32_t *) code_ptr = ((*(uint32_t *) code_ptr) & ~0xffffff)
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| (offset & 0xffffff);
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}
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static void patch_reloc(uint8_t *code_ptr, int type,
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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intptr_t value, intptr_t addend)
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{
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switch (type) {
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case R_ARM_ABS32:
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reloc_abs32(code_ptr, value);
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break;
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case R_ARM_CALL:
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case R_ARM_JUMP24:
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default:
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tcg_abort();
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case R_ARM_PC24:
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reloc_pc24(code_ptr, value);
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break;
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}
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assert(type == R_ARM_PC24);
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assert(addend == 0);
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reloc_pc24(code_ptr, (tcg_insn_unit *)value);
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}
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#define TCG_CT_CONST_ARM 0x100
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@ -379,20 +361,18 @@ static inline void tcg_out_b(TCGContext *s, int cond, int32_t offset)
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static inline void tcg_out_b_noaddr(TCGContext *s, int cond)
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{
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/* We pay attention here to not modify the branch target by skipping
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the corresponding bytes. This ensure that caches and memory are
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/* We pay attention here to not modify the branch target by masking
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the corresponding bytes. This ensure that caches and memory are
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kept coherent during retranslation. */
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s->code_ptr += 3;
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tcg_out8(s, (cond << 4) | 0x0a);
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tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0a));
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}
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static inline void tcg_out_bl_noaddr(TCGContext *s, int cond)
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{
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/* We pay attention here to not modify the branch target by skipping
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the corresponding bytes. This ensure that caches and memory are
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/* We pay attention here to not modify the branch target by masking
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the corresponding bytes. This ensure that caches and memory are
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kept coherent during retranslation. */
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s->code_ptr += 3;
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tcg_out8(s, (cond << 4) | 0x0b);
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tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0b));
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}
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static inline void tcg_out_bl(TCGContext *s, int cond, int32_t offset)
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@ -1010,20 +990,21 @@ static inline void tcg_out_st8(TCGContext *s, int cond,
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* with the code buffer limited to 16MB we wouldn't need the long case.
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* But we also use it for the tail-call to the qemu_ld/st helpers, which does.
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*/
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static inline void tcg_out_goto(TCGContext *s, int cond, uint32_t addr)
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static inline void tcg_out_goto(TCGContext *s, int cond, tcg_insn_unit *addr)
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{
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int32_t disp = addr - (tcg_target_long) s->code_ptr;
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intptr_t addri = (intptr_t)addr;
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ptrdiff_t disp = tcg_pcrel_diff(s, addr);
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if ((addr & 1) == 0 && disp - 8 < 0x01fffffd && disp - 8 > -0x01fffffd) {
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if ((addri & 1) == 0 && disp - 8 < 0x01fffffd && disp - 8 > -0x01fffffd) {
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tcg_out_b(s, cond, disp);
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return;
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}
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tcg_out_movi32(s, cond, TCG_REG_TMP, addr);
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tcg_out_movi32(s, cond, TCG_REG_TMP, addri);
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if (use_armv5t_instructions) {
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tcg_out_bx(s, cond, TCG_REG_TMP);
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} else {
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if (addr & 1) {
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if (addri & 1) {
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tcg_abort();
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}
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tcg_out_mov_reg(s, cond, TCG_REG_PC, TCG_REG_TMP);
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@ -1032,28 +1013,28 @@ static inline void tcg_out_goto(TCGContext *s, int cond, uint32_t addr)
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/* The call case is mostly used for helpers - so it's not unreasonable
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* for them to be beyond branch range */
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static inline void tcg_out_call(TCGContext *s, uint32_t addr)
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static void tcg_out_call(TCGContext *s, tcg_insn_unit *addr)
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{
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int32_t val;
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intptr_t addri = (intptr_t)addr;
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ptrdiff_t disp = tcg_pcrel_diff(s, addr);
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val = addr - (tcg_target_long) s->code_ptr;
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if (val - 8 < 0x02000000 && val - 8 >= -0x02000000) {
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if (addr & 1) {
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if (disp - 8 < 0x02000000 && disp - 8 >= -0x02000000) {
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if (addri & 1) {
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/* Use BLX if the target is in Thumb mode */
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if (!use_armv5t_instructions) {
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tcg_abort();
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}
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tcg_out_blx_imm(s, val);
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tcg_out_blx_imm(s, disp);
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} else {
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tcg_out_bl(s, COND_AL, val);
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tcg_out_bl(s, COND_AL, disp);
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}
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} else if (use_armv7_instructions) {
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tcg_out_movi32(s, COND_AL, TCG_REG_TMP, addr);
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tcg_out_movi32(s, COND_AL, TCG_REG_TMP, addri);
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tcg_out_blx(s, COND_AL, TCG_REG_TMP);
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} else {
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tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R14, TCG_REG_PC, 4);
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_PC, -4);
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tcg_out32(s, addr);
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tcg_out32(s, addri);
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}
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}
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@ -1073,9 +1054,9 @@ static inline void tcg_out_goto_label(TCGContext *s, int cond, int label_index)
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TCGLabel *l = &s->labels[label_index];
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if (l->has_value) {
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tcg_out_goto(s, cond, l->u.value);
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tcg_out_goto(s, cond, l->u.value_ptr);
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} else {
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tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, label_index, 31337);
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tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, label_index, 0);
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tcg_out_b_noaddr(s, cond);
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}
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}
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@ -1084,7 +1065,7 @@ static inline void tcg_out_goto_label(TCGContext *s, int cond, int label_index)
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/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
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* int mmu_idx, uintptr_t ra)
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*/
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static const void * const qemu_ld_helpers[16] = {
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static void * const qemu_ld_helpers[16] = {
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[MO_UB] = helper_ret_ldub_mmu,
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[MO_SB] = helper_ret_ldsb_mmu,
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@ -1104,7 +1085,7 @@ static const void * const qemu_ld_helpers[16] = {
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/* helper signature: helper_ret_st_mmu(CPUState *env, target_ulong addr,
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* uintxx_t val, int mmu_idx, uintptr_t ra)
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*/
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static const void * const qemu_st_helpers[16] = {
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static void * const qemu_st_helpers[16] = {
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[MO_UB] = helper_ret_stb_mmu,
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[MO_LEUW] = helper_le_stw_mmu,
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[MO_LEUL] = helper_le_stl_mmu,
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@ -1256,7 +1237,7 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
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static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOp opc,
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TCGReg datalo, TCGReg datahi, TCGReg addrlo,
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TCGReg addrhi, int mem_index,
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uint8_t *raddr, uint8_t *label_ptr)
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tcg_insn_unit *raddr, tcg_insn_unit *label_ptr)
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{
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TCGLabelQemuLdst *label = new_ldst_label(s);
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@ -1275,9 +1256,9 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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{
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TCGReg argreg, datalo, datahi;
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TCGMemOp opc = lb->opc;
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uintptr_t func;
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void *func;
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reloc_pc24(lb->label_ptr[0], (tcg_target_long)s->code_ptr);
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reloc_pc24(lb->label_ptr[0], s->code_ptr);
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argreg = tcg_out_arg_reg32(s, TCG_REG_R0, TCG_AREG0);
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if (TARGET_LONG_BITS == 64) {
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@ -1292,9 +1273,9 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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icache usage. For pre-armv6, use the signed helpers since we do
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not have a single insn sign-extend. */
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if (use_armv6_instructions) {
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func = (uintptr_t)qemu_ld_helpers[opc & ~MO_SIGN];
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func = qemu_ld_helpers[opc & ~MO_SIGN];
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} else {
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func = (uintptr_t)qemu_ld_helpers[opc];
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func = qemu_ld_helpers[opc];
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if (opc & MO_SIGN) {
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opc = MO_UL;
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}
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@ -1328,7 +1309,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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break;
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}
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tcg_out_goto(s, COND_AL, (tcg_target_long)lb->raddr);
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tcg_out_goto(s, COND_AL, lb->raddr);
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}
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static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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@ -1336,7 +1317,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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TCGReg argreg, datalo, datahi;
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TCGMemOp opc = lb->opc;
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reloc_pc24(lb->label_ptr[0], (tcg_target_long)s->code_ptr);
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reloc_pc24(lb->label_ptr[0], s->code_ptr);
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argreg = TCG_REG_R0;
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argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0);
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@ -1368,7 +1349,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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argreg = tcg_out_arg_reg32(s, argreg, TCG_REG_R14);
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/* Tail-call to the helper, which will return to the fast path. */
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tcg_out_goto(s, COND_AL, (uintptr_t)qemu_st_helpers[opc]);
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tcg_out_goto(s, COND_AL, qemu_st_helpers[opc]);
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}
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#endif /* SOFTMMU */
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@ -1499,7 +1480,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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TCGReg addend;
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uint8_t *label_ptr;
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tcg_insn_unit *label_ptr;
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#endif
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datalo = *args++;
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@ -1628,7 +1609,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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#ifdef CONFIG_SOFTMMU
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int mem_index;
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TCGReg addend;
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uint8_t *label_ptr;
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tcg_insn_unit *label_ptr;
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#endif
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datalo = *args++;
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@ -1660,7 +1641,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
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#endif
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}
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static uint8_t *tb_ret_addr;
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static tcg_insn_unit *tb_ret_addr;
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static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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const TCGArg *args, const int *const_args)
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@ -1670,51 +1651,28 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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switch (opc) {
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case INDEX_op_exit_tb:
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if (use_armv7_instructions || check_fit_imm(args[0])) {
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tcg_out_movi32(s, COND_AL, TCG_REG_R0, args[0]);
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tcg_out_goto(s, COND_AL, (tcg_target_ulong) tb_ret_addr);
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} else {
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uint8_t *ld_ptr = s->code_ptr;
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tcg_out_ld32_12(s, COND_AL, TCG_REG_R0, TCG_REG_PC, 0);
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tcg_out_goto(s, COND_AL, (tcg_target_ulong) tb_ret_addr);
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*ld_ptr = (uint8_t) (s->code_ptr - ld_ptr) - 8;
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tcg_out32(s, args[0]);
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}
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tcg_out_movi32(s, COND_AL, TCG_REG_R0, args[0]);
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tcg_out_goto(s, COND_AL, tb_ret_addr);
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break;
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case INDEX_op_goto_tb:
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if (s->tb_jmp_offset) {
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/* Direct jump method */
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#if defined(USE_DIRECT_JUMP)
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s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
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s->tb_jmp_offset[args[0]] = tcg_current_code_size(s);
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tcg_out_b_noaddr(s, COND_AL);
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#else
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_PC, -4);
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s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
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tcg_out32(s, 0);
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#endif
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} else {
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/* Indirect jump method */
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#if 1
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c = (int) (s->tb_next + args[0]) - ((int) s->code_ptr + 8);
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if (c > 0xfff || c < -0xfff) {
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tcg_out_movi32(s, COND_AL, TCG_REG_R0,
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(tcg_target_long) (s->tb_next + args[0]));
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_R0, 0);
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} else
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_PC, c);
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#else
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tcg_out_ld32_12(s, COND_AL, TCG_REG_R0, TCG_REG_PC, 0);
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_R0, 0);
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tcg_out32(s, (tcg_target_long) (s->tb_next + args[0]));
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#endif
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intptr_t ptr = (intptr_t)(s->tb_next + args[0]);
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tcg_out_movi32(s, COND_AL, TCG_REG_R0, ptr & ~0xfff);
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_R0, ptr & 0xfff);
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}
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s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
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s->tb_next_offset[args[0]] = tcg_current_code_size(s);
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break;
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case INDEX_op_call:
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if (const_args[0])
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tcg_out_call(s, args[0]);
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else
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if (const_args[0]) {
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tcg_out_call(s, (void *)args[0]);
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} else {
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tcg_out_callr(s, COND_AL, args[0]);
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}
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break;
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case INDEX_op_br:
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tcg_out_goto_label(s, COND_AL, args[0]);
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@ -26,6 +26,7 @@
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#define TCG_TARGET_ARM 1
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#undef TCG_TARGET_STACK_GROWSUP
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#define TCG_TARGET_INSN_UNIT_SIZE 4
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typedef enum {
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TCG_REG_R0 = 0,
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