target/hppa: Pass displacement to do_dbranch
Pass a displacement instead of an absolute value. In trans_be, remove the user-only do_dbranch case. The branch we are attempting to optimize is to the zero page, which is perforce on a different page than the code currently executing, which means that we will *not* use a goto_tb. Use a plain indirect branch instead, which is what we got out of the attempted direct branch anyway. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1766,9 +1766,11 @@ static bool do_fop_dedd(DisasContext *ctx, unsigned rt,
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/* Emit an unconditional branch to a direct target, which may or may not
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have already had nullification handled. */
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static bool do_dbranch(DisasContext *ctx, uint64_t dest,
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static bool do_dbranch(DisasContext *ctx, int64_t disp,
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unsigned link, bool is_n)
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{
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uint64_t dest = iaoq_dest(ctx, disp);
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if (ctx->null_cond.c == TCG_COND_NEVER && ctx->null_lab == NULL) {
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if (link != 0) {
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copy_iaoq_entry(ctx, cpu_gr[link], ctx->iaoq_n, ctx->iaoq_n_var);
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@ -1815,10 +1817,7 @@ static bool do_cbranch(DisasContext *ctx, int64_t disp, bool is_n,
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/* Handle TRUE and NEVER as direct branches. */
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if (c == TCG_COND_ALWAYS) {
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return do_dbranch(ctx, dest, 0, is_n && disp >= 0);
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}
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if (c == TCG_COND_NEVER) {
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return do_dbranch(ctx, ctx->iaoq_n, 0, is_n && disp < 0);
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return do_dbranch(ctx, disp, 0, is_n && disp >= 0);
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}
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taken = gen_new_label();
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@ -3914,22 +3913,6 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
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{
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TCGv_i64 tmp;
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#ifdef CONFIG_USER_ONLY
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/* ??? It seems like there should be a good way of using
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"be disp(sr2, r0)", the canonical gateway entry mechanism
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to our advantage. But that appears to be inconvenient to
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manage along side branch delay slots. Therefore we handle
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entry into the gateway page via absolute address. */
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/* Since we don't implement spaces, just branch. Do notice the special
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case of "be disp(*,r0)" using a direct branch to disp, so that we can
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goto_tb to the TB containing the syscall. */
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if (a->b == 0) {
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return do_dbranch(ctx, a->disp, a->l, a->n);
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}
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#else
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nullify_over(ctx);
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#endif
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tmp = tcg_temp_new_i64();
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tcg_gen_addi_i64(tmp, load_gpr(ctx, a->b), a->disp);
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tmp = do_ibranch_priv(ctx, tmp);
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@ -3939,6 +3922,8 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
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#else
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TCGv_i64 new_spc = tcg_temp_new_i64();
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nullify_over(ctx);
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load_spr(ctx, new_spc, a->sp);
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if (a->l) {
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copy_iaoq_entry(ctx, cpu_gr[31], ctx->iaoq_n, ctx->iaoq_n_var);
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@ -3968,7 +3953,7 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
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static bool trans_bl(DisasContext *ctx, arg_bl *a)
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{
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return do_dbranch(ctx, iaoq_dest(ctx, a->disp), a->l, a->n);
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return do_dbranch(ctx, a->disp, a->l, a->n);
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}
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static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a)
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@ -4022,7 +4007,7 @@ static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a)
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save_gpr(ctx, a->l, tmp);
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}
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return do_dbranch(ctx, dest, 0, a->n);
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return do_dbranch(ctx, dest - iaoq_dest(ctx, 0), 0, a->n);
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}
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static bool trans_blr(DisasContext *ctx, arg_blr *a)
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@ -4035,7 +4020,7 @@ static bool trans_blr(DisasContext *ctx, arg_blr *a)
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return do_ibranch(ctx, tmp, a->l, a->n);
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} else {
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/* BLR R0,RX is a good way to load PC+8 into RX. */
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return do_dbranch(ctx, ctx->iaoq_f + 8, a->l, a->n);
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return do_dbranch(ctx, 0, a->l, a->n);
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}
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}
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