accel/tcg: Allow the second page of an instruction to be MMIO
If an instruction straddles a page boundary, and the first page was ram, but the second page was MMIO, we would abort. Handle this as if both pages are MMIO, by setting the ram_addr_t for the first page to -1. Reported-by: Sid Manning <sidneym@quicinc.com> Reported-by: Jørgen Hansen <Jorgen.Hansen@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -176,8 +176,16 @@ static void *translator_access(CPUArchState *env, DisasContextBase *db,
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if (host == NULL) {
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if (host == NULL) {
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tb_page_addr_t phys_page =
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tb_page_addr_t phys_page =
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get_page_addr_code_hostp(env, base, &db->host_addr[1]);
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get_page_addr_code_hostp(env, base, &db->host_addr[1]);
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/* We cannot handle MMIO as second page. */
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assert(phys_page != -1);
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/*
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* If the second page is MMIO, treat as if the first page
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* was MMIO as well, so that we do not cache the TB.
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*/
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if (unlikely(phys_page == -1)) {
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tb_set_page_addr0(tb, -1);
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return NULL;
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}
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tb_set_page_addr1(tb, phys_page);
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tb_set_page_addr1(tb, phys_page);
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#ifdef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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page_protect(end);
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page_protect(end);
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