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target/hppa: Use env_cpu, env_archcpu

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Cleanup in the boilerplate that each target must define.
Replace hppa_env_get_cpu with env_archcpu.  The combination
CPU(hppa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-03-22 17:51:33 -07:00
parent dbefca236a
commit 25f327081b
6 changed files with 11 additions and 21 deletions
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2
linux-user/hppa/cpu_loop.c
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@ -105,7 +105,7 @@ static abi_ulong hppa_lws(CPUHPPAState *env)
void cpu_loop(CPUHPPAState *env)
{
CPUState *cs = CPU(hppa_env_get_cpu(env));
CPUState *cs = env_cpu(env);
target_siginfo_t info;
abi_ulong ret;
int trapnr;

5
target/hppa/cpu.h
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@ -222,11 +222,6 @@ struct HPPACPU {
QEMUTimer *alarm_timer;
};
static inline HPPACPU *hppa_env_get_cpu(CPUHPPAState *env)
{
return container_of(env, HPPACPU, env);
}
#define ENV_OFFSET offsetof(HPPACPU, env)
typedef CPUHPPAState CPUArchState;

3
target/hppa/helper.c
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@ -71,8 +71,7 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw)
/* If PSW_P changes, it affects how we translate addresses. */
if ((psw ^ old_psw) & PSW_P) {
#ifndef CONFIG_USER_ONLY
CPUState *src = CPU(hppa_env_get_cpu(env));
tlb_flush_by_mmuidx(src, 0xf);
tlb_flush_by_mmuidx(env_cpu(env), 0xf);
#endif
}
}

4
target/hppa/int_helper.c
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@ -77,7 +77,7 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ureg val)
{
env->cr[CR_EIRR] &= ~val;
qemu_mutex_lock_iothread();
eval_interrupt(hppa_env_get_cpu(env));
eval_interrupt(env_archcpu(env));
qemu_mutex_unlock_iothread();
}
@ -85,7 +85,7 @@ void HELPER(write_eiem)(CPUHPPAState *env, target_ureg val)
{
env->cr[CR_EIEM] = val;
qemu_mutex_lock_iothread();
eval_interrupt(hppa_env_get_cpu(env));
eval_interrupt(env_archcpu(env));
qemu_mutex_unlock_iothread();
}
#endif /* !CONFIG_USER_ONLY */

10
target/hppa/mem_helper.c
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@ -56,7 +56,7 @@ static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)
static void hppa_flush_tlb_ent(CPUHPPAState *env, hppa_tlb_entry *ent)
{
CPUState *cs = CPU(hppa_env_get_cpu(env));
CPUState *cs = env_cpu(env);
unsigned i, n = 1 << (2 * ent->page_size);
uint64_t addr = ent->va_b;
@ -329,7 +329,7 @@ static void ptlb_work(CPUState *cpu, run_on_cpu_data data)
void HELPER(ptlb)(CPUHPPAState *env, target_ulong addr)
{
CPUState *src = CPU(hppa_env_get_cpu(env));
CPUState *src = env_cpu(env);
CPUState *cpu;
trace_hppa_tlb_ptlb(env);
run_on_cpu_data data = RUN_ON_CPU_TARGET_PTR(addr);
@ -346,17 +346,15 @@ void HELPER(ptlb)(CPUHPPAState *env, target_ulong addr)
number of pages/entries (we choose all), and is local to the cpu. */
void HELPER(ptlbe)(CPUHPPAState *env)
{
CPUState *src = CPU(hppa_env_get_cpu(env));
trace_hppa_tlb_ptlbe(env);
memset(env->tlb, 0, sizeof(env->tlb));
tlb_flush_by_mmuidx(src, 0xf);
tlb_flush_by_mmuidx(env_cpu(env), 0xf);
}
void cpu_hppa_change_prot_id(CPUHPPAState *env)
{
if (env->psw & PSW_P) {
CPUState *src = CPU(hppa_env_get_cpu(env));
tlb_flush_by_mmuidx(src, 0xf);
tlb_flush_by_mmuidx(env_cpu(env), 0xf);
}
}

8
target/hppa/op_helper.c
View File

@ -29,8 +29,7 @@
void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
{
HPPACPU *cpu = hppa_env_get_cpu(env);
CPUState *cs = CPU(cpu);
CPUState *cs = env_cpu(env);
cs->exception_index = excp;
cpu_loop_exit(cs);
@ -38,8 +37,7 @@ void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
{
HPPACPU *cpu = hppa_env_get_cpu(env);
CPUState *cs = CPU(cpu);
CPUState *cs = env_cpu(env);
cs->exception_index = excp;
cpu_loop_exit_restore(cs, ra);
@ -630,7 +628,7 @@ target_ureg HELPER(read_interval_timer)(void)
#ifndef CONFIG_USER_ONLY
void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
{
HPPACPU *cpu = hppa_env_get_cpu(env);
HPPACPU *cpu = env_archcpu(env);
uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
uint64_t timeout;