pc,virtio: last minute bugfixes
Two last minute bugfixes. They are both designed to prevent compatibility headaches down the road. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmBsQkMPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpUvUH/RPU/bvWjwcfjt0PSySslxleLLZX2ixZRWTl Ij1+Ibl47Lxa5lI0ZMibac3Q4CC0+20pwGITX6165AXwMUxtHcUij+d6SW//ZrAv rFOtAgpHGtL82ShwpWt73Qa/iZKAnl0GRaqs/gZJcFViUGPBZsDT1abG+OgI5EDh l3+j+3CbwrZWqGygaVYNHbx/ZaO6+rq/RVxsQl6bNbP7XItanMj43NyhSngHtt7S /UNSq9xAVSlVpCbkGqfNhms9ET4FwKoJgBK+FE2OFG5TqJoBYXKmUJx/9GML9R1d 2qwSAT9NCTniSX47mIHbcMgQZTXDkkWmvUhaSREASmlAjzoqAlQ= =GXh7 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,virtio: last minute bugfixes Two last minute bugfixes. They are both designed to prevent compatibility headaches down the road. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 06 Apr 2021 12:13:07 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: virtio-pci: compat page aligned ATS x86: rename oem-id and oem-table-id properties Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
259e909790
@ -2670,19 +2670,19 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
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"Set on/off to enable/disable "
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"ITS instantiation");
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object_class_property_add_str(oc, "oem-id",
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object_class_property_add_str(oc, "x-oem-id",
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virt_get_oem_id,
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virt_set_oem_id);
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object_class_property_set_description(oc, "oem-id",
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object_class_property_set_description(oc, "x-oem-id",
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"Override the default value of field OEMID "
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"in ACPI table header."
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"The string may be up to 6 bytes in size");
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object_class_property_add_str(oc, "oem-table-id",
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object_class_property_add_str(oc, "x-oem-table-id",
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virt_get_oem_table_id,
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virt_set_oem_table_id);
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object_class_property_set_description(oc, "oem-table-id",
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object_class_property_set_description(oc, "x-oem-table-id",
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"Override the default value of field OEM Table ID "
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"in ACPI table header."
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"The string may be up to 8 bytes in size");
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@ -53,6 +53,7 @@ GlobalProperty hw_compat_5_1[] = {
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{ "nvme", "use-intel-id", "on"},
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{ "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
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{ "pl011", "migrate-clk", "off" },
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{ "virtio-pci", "x-ats-page-aligned", "off"},
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};
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const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
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@ -963,16 +963,18 @@ void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num)
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pci_set_quad(dev->config + offset + pci_dsn_cap, ser_num);
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}
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void pcie_ats_init(PCIDevice *dev, uint16_t offset)
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void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned)
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{
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pcie_add_capability(dev, PCI_EXT_CAP_ID_ATS, 0x1,
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offset, PCI_EXT_CAP_ATS_SIZEOF);
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dev->exp.ats_cap = offset;
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/* Invalidate Queue Depth 0, Page Aligned Request 1 */
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pci_set_word(dev->config + offset + PCI_ATS_CAP,
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PCI_ATS_CAP_PAGE_ALIGNED);
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/* Invalidate Queue Depth 0 */
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if (aligned) {
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pci_set_word(dev->config + offset + PCI_ATS_CAP,
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PCI_ATS_CAP_PAGE_ALIGNED);
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}
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/* STU 0, Disabled by default */
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pci_set_word(dev->config + offset + PCI_ATS_CTRL, 0);
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@ -1856,7 +1856,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
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}
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if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
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pcie_ats_init(pci_dev, last_pcie_cap_offset);
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pcie_ats_init(pci_dev, last_pcie_cap_offset,
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proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED);
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last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
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}
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@ -1933,6 +1934,8 @@ static Property virtio_pci_properties[] = {
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ignore_backend_features, false),
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DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_ATS_BIT, false),
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DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true),
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DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
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DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
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@ -42,6 +42,7 @@ enum {
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VIRTIO_PCI_FLAG_INIT_PM_BIT,
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VIRTIO_PCI_FLAG_INIT_FLR_BIT,
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VIRTIO_PCI_FLAG_AER_BIT,
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VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT,
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};
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/* Need to activate work-arounds for buggy guests at vmstate load. */
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@ -84,6 +85,10 @@ enum {
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/* Advanced Error Reporting capability */
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#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT)
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/* Page Aligned Address space Translation Service */
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#define VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED \
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(1 << VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT)
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typedef struct {
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MSIMessage msg;
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int virq;
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@ -78,8 +78,8 @@ struct X86MachineState {
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#define X86_MACHINE_SMM "smm"
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#define X86_MACHINE_ACPI "acpi"
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#define X86_MACHINE_OEM_ID "oem-id"
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#define X86_MACHINE_OEM_TABLE_ID "oem-table-id"
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#define X86_MACHINE_OEM_ID "x-oem-id"
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#define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id"
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#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
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OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE)
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@ -137,7 +137,7 @@ void pcie_acs_reset(PCIDevice *dev);
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void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn);
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void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num);
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void pcie_ats_init(PCIDevice *dev, uint16_t offset);
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void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned);
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void pcie_cap_slot_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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Error **errp);
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@ -73,7 +73,7 @@
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#define OEM_ID "TEST"
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#define OEM_TABLE_ID "OEM"
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#define OEM_TEST_ARGS "-machine oem-id="OEM_ID",oem-table-id="OEM_TABLE_ID
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#define OEM_TEST_ARGS "-machine x-oem-id="OEM_ID",x-oem-table-id="OEM_TABLE_ID
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typedef struct {
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bool tcg_only;
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