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i8259: Replace PicState::pics_state with master flag

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This reflects how real PICs indentify their role (in non-buffered mode):
Pass the state of the /SP input on pic_init and use it instead of
pics_state to differentiate between master and slave mode.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Jan Kiszka 2011-10-07 09:19:50 +02:00 committed by Blue Swirl
parent 6e5580ca2b
commit 2598539642
1 changed files with 9 additions and 9 deletions
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18
hw/i8259.c
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@ -59,7 +59,7 @@ typedef struct PicState {
uint8_t elcr; /* PIIX edge/trigger selection*/
uint8_t elcr_mask;
qemu_irq int_out;
PicState2 *pics_state;
bool master; /* reflects /SP input pin */
MemoryRegion base_io;
MemoryRegion elcr_io;
} PicState;
@ -107,8 +107,9 @@ static int pic_get_irq(PicState *s)
mask = s->isr;
if (s->special_mask)
mask &= ~s->imr;
if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
if (s->special_fully_nested_mode && s->master) {
mask &= ~(1 << 2);
}
cur_priority = get_priority(s, mask);
if (priority < cur_priority) {
/* higher priority found: an irq should be generated */
@ -126,8 +127,7 @@ static void pic_update_irq(PicState *s)
irq = pic_get_irq(s);
if (irq >= 0) {
DPRINTF("pic%d: imr=%x irr=%x padd=%d\n",
s == &s->pics_state->pics[0] ? 0 : 1, s->imr, s->irr,
s->priority_add);
s->master ? 0 : 1, s->imr, s->irr, s->priority_add);
qemu_irq_raise(s->int_out);
} else {
qemu_irq_lower(s->int_out);
@ -454,9 +454,11 @@ static const MemoryRegionOps pic_elcr_ioport_ops = {
};
/* XXX: add generic master/slave system */
static void pic_init(int io_addr, int elcr_addr, PicState *s, qemu_irq int_out)
static void pic_init(int io_addr, int elcr_addr, PicState *s, qemu_irq int_out,
bool master)
{
s->int_out = int_out;
s->master = master;
memory_region_init_io(&s->base_io, &pic_base_ioport_ops, s, "pic", 2);
memory_region_init_io(&s->elcr_io, &pic_elcr_ioport_ops, s, "elcr", 1);
@ -512,12 +514,10 @@ qemu_irq *i8259_init(qemu_irq parent_irq)
s = g_malloc0(sizeof(PicState2));
irqs = qemu_allocate_irqs(i8259_set_irq, s, 16);
pic_init(0x20, 0x4d0, &s->pics[0], parent_irq);
pic_init(0xa0, 0x4d1, &s->pics[1], irqs[2]);
pic_init(0x20, 0x4d0, &s->pics[0], parent_irq, true);
pic_init(0xa0, 0x4d1, &s->pics[1], irqs[2], false);
s->pics[0].elcr_mask = 0xf8;
s->pics[1].elcr_mask = 0xde;
s->pics[0].pics_state = s;
s->pics[1].pics_state = s;
isa_pic = s;
return irqs;
}