hw/pc.c: Replace register_ioport_*
Replace all register_ioport_*() with portio_*() or a MemoryRegion. This permits to use the new Memory stuff like listeners. Signed-off-by: Julien Grall <julien.grall@citrix.com> Acked-by: Avi Kivity <avi@redhat.com> [AF: Rebased onto hwaddr] Signed-off-by: Andreas Färber <afaerber@suse.de>
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568fd159e4
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258711c644
49
hw/pc.c
49
hw/pc.c
@ -98,7 +98,8 @@ void gsi_handler(void *opaque, int n, int level)
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qemu_set_irq(s->ioapic_irq[n], level);
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}
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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static void ioport80_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned size)
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{
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}
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@ -116,7 +117,8 @@ void cpu_set_ferr(CPUX86State *s)
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qemu_irq_raise(ferr_irq);
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}
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
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static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned size)
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{
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qemu_irq_lower(ferr_irq);
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}
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@ -567,6 +569,14 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
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return index;
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}
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static const MemoryRegionPortio bochs_bios_portio_list[] = {
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{ 0x500, 1, 1, .write = bochs_bios_write, }, /* 0x500 */
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{ 0x501, 1, 1, .write = bochs_bios_write, }, /* 0x501 */
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{ 0x501, 2, 2, .write = bochs_bios_write, }, /* 0x501 */
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{ 0x8900, 1, 1, .write = bochs_bios_write, }, /* 0x8900 */
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PORTIO_END_OF_LIST(),
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};
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static void *bochs_bios_init(void)
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{
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void *fw_cfg;
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@ -574,12 +584,11 @@ static void *bochs_bios_init(void)
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size_t smbios_len;
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uint64_t *numa_fw_cfg;
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int i, j;
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PortioList *bochs_bios_port_list = g_new(PortioList, 1);
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register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
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register_ioport_write(0x501, 1, 1, bochs_bios_write, NULL);
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register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
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register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
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portio_list_init(bochs_bios_port_list, bochs_bios_portio_list,
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NULL, "bochs-bios");
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portio_list_add(bochs_bios_port_list, get_system_io(), 0x0);
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fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
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@ -967,6 +976,24 @@ static void cpu_request_exit(void *opaque, int irq, int level)
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}
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}
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static const MemoryRegionOps ioport80_io_ops = {
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.write = ioport80_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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static const MemoryRegionOps ioportF0_io_ops = {
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.write = ioportF0_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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ISADevice **floppy,
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@ -981,10 +1008,14 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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qemu_irq *a20_line;
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ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
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qemu_irq *cpu_exit_irq;
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MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
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MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
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register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
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memory_region_init_io(ioport80_io, &ioport80_io_ops, NULL, "ioport80", 1);
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memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io);
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register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
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memory_region_init_io(ioportF0_io, &ioportF0_io_ops, NULL, "ioportF0", 1);
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memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
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/*
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* Check if an HPET shall be created.
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