acpi: fix piix4 smbus mapping
Make write to the smbus base register and enable bit actually work. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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798512e552
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24fe083de6
@ -142,13 +142,30 @@ static void pm_io_space_update(PIIX4PMState *s)
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memory_region_transaction_commit();
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}
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static void smbus_io_space_update(PIIX4PMState *s)
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{
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s->smb_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x90));
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s->smb_io_base &= 0xffc0;
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memory_region_transaction_begin();
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memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & 1);
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memory_region_set_address(&s->smb.io, s->smb_io_base);
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memory_region_transaction_commit();
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}
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static void pm_write_config(PCIDevice *d,
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uint32_t address, uint32_t val, int len)
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{
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pci_default_write_config(d, address, val, len);
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if (range_covers_byte(address, len, 0x80))
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if (range_covers_byte(address, len, 0x80) ||
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ranges_overlap(address, len, 0x40, 4)) {
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pm_io_space_update((PIIX4PMState *)d);
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}
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if (range_covers_byte(address, len, 0xd2) ||
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ranges_overlap(address, len, 0x90, 4)) {
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smbus_io_space_update((PIIX4PMState *)d);
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}
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}
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static void vmstate_pci_status_pre_save(void *opaque)
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{
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@ -392,6 +409,7 @@ static int piix4_pm_initfn(PCIDevice *dev)
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pci_conf[0x91] = s->smb_io_base >> 8;
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pci_conf[0xd2] = 0x09;
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pm_smbus_init(&s->dev.qdev, &s->smb);
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memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1);
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memory_region_add_subregion(get_system_io(), s->smb_io_base, &s->smb.io);
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memory_region_init(&s->io, "piix4-pm", 64);
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