net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState
Moving this buffers to CadenceGEMState, as their size will be increased more when JUMBO frames support is added. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
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@ -928,17 +928,14 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q)
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*/
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static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
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{
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CadenceGEMState *s;
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CadenceGEMState *s = qemu_get_nic_opaque(nc);
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unsigned rxbufsize, bytes_to_copy;
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unsigned rxbuf_offset;
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uint8_t rxbuf[2048];
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uint8_t *rxbuf_ptr;
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bool first_desc = true;
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int maf;
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int q = 0;
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s = qemu_get_nic_opaque(nc);
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/* Is this destination MAC address "for us" ? */
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maf = gem_mac_address_filter(s, buf);
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if (maf == GEM_RX_REJECT) {
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@ -994,19 +991,19 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
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} else {
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unsigned crc_val;
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if (size > sizeof(rxbuf) - sizeof(crc_val)) {
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size = sizeof(rxbuf) - sizeof(crc_val);
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if (size > MAX_FRAME_SIZE - sizeof(crc_val)) {
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size = MAX_FRAME_SIZE - sizeof(crc_val);
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}
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bytes_to_copy = size;
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/* The application wants the FCS field, which QEMU does not provide.
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* We must try and calculate one.
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*/
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memcpy(rxbuf, buf, size);
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memset(rxbuf + size, 0, sizeof(rxbuf) - size);
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rxbuf_ptr = rxbuf;
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crc_val = cpu_to_le32(crc32(0, rxbuf, MAX(size, 60)));
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memcpy(rxbuf + size, &crc_val, sizeof(crc_val));
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memcpy(s->rx_packet, buf, size);
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memset(s->rx_packet + size, 0, MAX_FRAME_SIZE - size);
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rxbuf_ptr = s->rx_packet;
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crc_val = cpu_to_le32(crc32(0, s->rx_packet, MAX(size, 60)));
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memcpy(s->rx_packet + size, &crc_val, sizeof(crc_val));
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bytes_to_copy += 4;
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size += 4;
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@ -1152,7 +1149,6 @@ static void gem_transmit(CadenceGEMState *s)
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{
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uint32_t desc[DESC_MAX_NUM_WORDS];
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hwaddr packet_desc_addr;
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uint8_t tx_packet[2048];
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uint8_t *p;
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unsigned total_bytes;
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int q = 0;
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@ -1168,7 +1164,7 @@ static void gem_transmit(CadenceGEMState *s)
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* Packets scattered across multiple descriptors are gathered to this
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* one contiguous buffer first.
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*/
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p = tx_packet;
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p = s->tx_packet;
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total_bytes = 0;
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for (q = s->num_priority_queues - 1; q >= 0; q--) {
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@ -1198,12 +1194,12 @@ static void gem_transmit(CadenceGEMState *s)
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break;
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}
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if (tx_desc_get_length(desc) > sizeof(tx_packet) -
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(p - tx_packet)) {
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if (tx_desc_get_length(desc) > MAX_FRAME_SIZE -
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(p - s->tx_packet)) {
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DB_PRINT("TX descriptor @ 0x%" HWADDR_PRIx \
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" too large: size 0x%x space 0x%zx\n",
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packet_desc_addr, tx_desc_get_length(desc),
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sizeof(tx_packet) - (p - tx_packet));
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MAX_FRAME_SIZE - (p - s->tx_packet));
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break;
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}
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@ -1248,24 +1244,24 @@ static void gem_transmit(CadenceGEMState *s)
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/* Is checksum offload enabled? */
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if (s->regs[GEM_DMACFG] & GEM_DMACFG_TXCSUM_OFFL) {
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net_checksum_calculate(tx_packet, total_bytes);
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net_checksum_calculate(s->tx_packet, total_bytes);
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}
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/* Update MAC statistics */
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gem_transmit_updatestats(s, tx_packet, total_bytes);
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gem_transmit_updatestats(s, s->tx_packet, total_bytes);
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/* Send the packet somewhere */
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if (s->phy_loop || (s->regs[GEM_NWCTRL] &
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GEM_NWCTRL_LOCALLOOP)) {
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gem_receive(qemu_get_queue(s->nic), tx_packet,
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gem_receive(qemu_get_queue(s->nic), s->tx_packet,
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total_bytes);
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} else {
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qemu_send_packet(qemu_get_queue(s->nic), tx_packet,
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qemu_send_packet(qemu_get_queue(s->nic), s->tx_packet,
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total_bytes);
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}
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/* Prepare for next packet */
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p = tx_packet;
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p = s->tx_packet;
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total_bytes = 0;
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}
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@ -40,6 +40,8 @@
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#define MAX_TYPE1_SCREENERS 16
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#define MAX_TYPE2_SCREENERS 16
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#define MAX_FRAME_SIZE 2048
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typedef struct CadenceGEMState {
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/*< private >*/
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SysBusDevice parent_obj;
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@ -80,6 +82,8 @@ typedef struct CadenceGEMState {
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uint8_t can_rx_state; /* Debug only */
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uint8_t tx_packet[MAX_FRAME_SIZE];
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uint8_t rx_packet[MAX_FRAME_SIZE];
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uint32_t rx_desc[MAX_PRIORITY_QUEUES][DESC_MAX_NUM_WORDS];
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bool sar_active[4];
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