hw/arm/mps2-tz: Add mps2-an521 model
Add a model of the MPS2 FPGA image described in Application Note AN521. This is identical to the AN505 image, except that it uses the SSE-200 rather than the IoTKit and so has two Cortex-M33 CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-24-peter.maydell@linaro.org
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@ -15,6 +15,7 @@
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* as seen by the guest depend significantly on the FPGA image.
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* This source file covers the following FPGA images, for TrustZone cores:
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* "mps2-an505" -- Cortex-M33 as documented in ARM Application Note AN505
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* "mps2-an521" -- Dual Cortex-M33 as documented in Application Note AN521
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*
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* Links to the TRM for the board itself and to the various Application
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* Notes which document the FPGA images can be found here:
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@ -24,10 +25,16 @@
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* http://infocenter.arm.com/help/topic/com.arm.doc.100112_0200_06_en/versatile_express_cortex_m_prototyping_systems_v2m_mps2_and_v2m_mps2plus_technical_reference_100112_0200_06_en.pdf
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* Application Note AN505:
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* http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html
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* Application Note AN521:
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* http://infocenter.arm.com/help/topic/com.arm.doc.dai0521c/index.html
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*
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* The AN505 defers to the Cortex-M33 processor ARMv8M IoT Kit FVP User Guide
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* (ARM ECM0601256) for the details of some of the device layout:
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html
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* Similarly, the AN521 uses the SSE-200, and the SSE-200 TRM defines
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* most of the device layout:
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* http://infocenter.arm.com/help/topic/com.arm.doc.101104_0100_00_en/corelink_sse200_subsystem_for_embedded_technical_reference_manual_101104_0100_00_en.pdf
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*
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*/
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#include "qemu/osdep.h"
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@ -64,6 +71,7 @@ typedef struct {
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MachineClass parent;
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MPS2TZFPGAType fpga_type;
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uint32_t scc_id;
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const char *armsse_type;
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} MPS2TZMachineClass;
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typedef struct {
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@ -93,6 +101,7 @@ typedef struct {
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#define TYPE_MPS2TZ_MACHINE "mps2tz"
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#define TYPE_MPS2TZ_AN505_MACHINE MACHINE_TYPE_NAME("mps2-an505")
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#define TYPE_MPS2TZ_AN521_MACHINE MACHINE_TYPE_NAME("mps2-an521")
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#define MPS2TZ_MACHINE(obj) \
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OBJECT_CHECK(MPS2TZMachineState, obj, TYPE_MPS2TZ_MACHINE)
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@ -379,7 +388,7 @@ static void mps2tz_common_init(MachineState *machine)
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}
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sysbus_init_child_obj(OBJECT(machine), "iotkit", &mms->iotkit,
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sizeof(mms->iotkit), TYPE_IOTKIT);
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sizeof(mms->iotkit), mmc->armsse_type);
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iotkitdev = DEVICE(&mms->iotkit);
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object_property_set_link(OBJECT(&mms->iotkit), OBJECT(system_memory),
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"memory", &error_abort);
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@ -632,7 +641,6 @@ static void mps2tz_class_init(ObjectClass *oc, void *data)
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IDAUInterfaceClass *iic = IDAU_INTERFACE_CLASS(oc);
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mc->init = mps2tz_common_init;
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mc->max_cpus = 1;
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iic->check = mps2_tz_idau_check;
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}
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@ -642,9 +650,28 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
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MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
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mc->desc = "ARM MPS2 with AN505 FPGA image for Cortex-M33";
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mc->default_cpus = 1;
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mc->min_cpus = mc->default_cpus;
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mc->max_cpus = mc->default_cpus;
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mmc->fpga_type = FPGA_AN505;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
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mmc->scc_id = 0x41045050;
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mmc->armsse_type = TYPE_IOTKIT;
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}
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static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
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mc->desc = "ARM MPS2 with AN521 FPGA image for dual Cortex-M33";
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mc->default_cpus = 2;
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mc->min_cpus = mc->default_cpus;
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mc->max_cpus = mc->default_cpus;
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mmc->fpga_type = FPGA_AN521;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
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mmc->scc_id = 0x41045210;
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mmc->armsse_type = TYPE_SSE200;
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}
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static const TypeInfo mps2tz_info = {
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@ -666,10 +693,17 @@ static const TypeInfo mps2tz_an505_info = {
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.class_init = mps2tz_an505_class_init,
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};
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static const TypeInfo mps2tz_an521_info = {
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.name = TYPE_MPS2TZ_AN521_MACHINE,
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.parent = TYPE_MPS2TZ_MACHINE,
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.class_init = mps2tz_an521_class_init,
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};
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static void mps2tz_machine_init(void)
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{
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type_register_static(&mps2tz_info);
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type_register_static(&mps2tz_an505_info);
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type_register_static(&mps2tz_an521_info);
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}
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type_init(mps2tz_machine_init);
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