tcg/tci: Support TCG_COND_TST{EQ,NE}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-24 22:52:26 -07:00
parent 585b7a4247
commit 23c5692abc
2 changed files with 15 additions and 1 deletions

View File

@ -228,6 +228,12 @@ static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition)
case TCG_COND_GTU:
result = (u0 > u1);
break;
case TCG_COND_TSTEQ:
result = (u0 & u1) == 0;
break;
case TCG_COND_TSTNE:
result = (u0 & u1) != 0;
break;
default:
g_assert_not_reached();
}
@ -270,6 +276,12 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition)
case TCG_COND_GTU:
result = (u0 > u1);
break;
case TCG_COND_TSTEQ:
result = (u0 & u1) == 0;
break;
case TCG_COND_TSTNE:
result = (u0 & u1) != 0;
break;
default:
g_assert_not_reached();
}
@ -1041,6 +1053,8 @@ static const char *str_c(TCGCond c)
[TCG_COND_GEU] = "geu",
[TCG_COND_LEU] = "leu",
[TCG_COND_GTU] = "gtu",
[TCG_COND_TSTEQ] = "tsteq",
[TCG_COND_TSTNE] = "tstne",
};
assert((unsigned)c < ARRAY_SIZE(cond));

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@ -117,7 +117,7 @@
#define TCG_TARGET_HAS_qemu_ldst_i128 0
#define TCG_TARGET_HAS_tst 0
#define TCG_TARGET_HAS_tst 1
/* Number of registers available. */
#define TCG_TARGET_NB_REGS 16