ppc/pnv: change the PowerNV machine devices to be non user creatable
The PowerNV machine emulates an OpenPOWER system and the PowerNV chip devices are models of the internal logic of the POWER processor. They can not be instantiated by the user on the QEMU command line. The PHB3/PHB4 devices could be an exception in the future after some rework on how the device tree is built. For the moment, exclude them also. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200129113720.7404-1-clg@kaod.org> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -1115,6 +1115,7 @@ static void pnv_phb3_class_init(ObjectClass *klass, void *data)
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dc->realize = pnv_phb3_realize;
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device_class_set_props(dc, pnv_phb3_properties);
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_phb3_type_info = {
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@ -1168,6 +1169,7 @@ static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data)
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device_class_set_parent_realize(dc, pnv_phb3_root_port_realize,
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&rpc->parent_realize);
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dc->user_creatable = false;
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k->vendor_id = PCI_VENDOR_ID_IBM;
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k->device_id = 0x03dc;
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@ -335,6 +335,7 @@ static void pnv_pbcq_class_init(ObjectClass *klass, void *data)
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xdc->dt_xscom = pnv_pbcq_dt_xscom;
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dc->realize = pnv_pbcq_realize;
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_pbcq_type_info = {
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@ -1290,7 +1290,7 @@ static void pnv_phb4_class_init(ObjectClass *klass, void *data)
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dc->realize = pnv_phb4_realize;
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device_class_set_props(dc, pnv_phb4_properties);
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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dc->user_creatable = true;
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dc->user_creatable = false;
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dc->reset = pnv_phb4_reset;
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xfc->notify = pnv_phb4_xive_notify;
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@ -1368,6 +1368,7 @@ static void pnv_phb4_root_port_class_init(ObjectClass *klass, void *data)
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PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
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dc->desc = "IBM PHB4 PCIE Root Port";
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dc->user_creatable = false;
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device_class_set_parent_realize(dc, pnv_phb4_root_port_realize,
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&rpc->parent_realize);
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@ -490,6 +490,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void *data)
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dc->realize = pnv_pec_realize;
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device_class_set_props(dc, pnv_pec_properties);
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dc->user_creatable = false;
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pecc->xscom_nest_base = pnv_pec_xscom_nest_base;
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pecc->xscom_pci_base = pnv_pec_xscom_pci_base;
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@ -568,6 +569,7 @@ static void pnv_pec_stk_class_init(ObjectClass *klass, void *data)
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device_class_set_props(dc, pnv_pec_stk_properties);
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dc->realize = pnv_pec_stk_realize;
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dc->user_creatable = false;
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/* TODO: reset regs ? */
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}
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@ -325,6 +325,7 @@ static void pnv_core_class_init(ObjectClass *oc, void *data)
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dc->realize = pnv_core_realize;
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dc->unrealize = pnv_core_unrealize;
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device_class_set_props(dc, pnv_core_properties);
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dc->user_creatable = false;
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}
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#define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
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@ -423,6 +424,7 @@ static void pnv_quad_class_init(ObjectClass *oc, void *data)
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dc->realize = pnv_quad_realize;
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device_class_set_props(dc, pnv_quad_properties);
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_quad_info = {
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@ -360,6 +360,7 @@ static void pnv_homer_class_init(ObjectClass *klass, void *data)
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dc->realize = pnv_homer_realize;
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dc->desc = "PowerNV HOMER Memory";
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device_class_set_props(dc, pnv_homer_properties);
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_homer_type_info = {
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@ -762,6 +762,7 @@ static void pnv_lpc_class_init(ObjectClass *klass, void *data)
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dc->realize = pnv_lpc_realize;
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dc->desc = "PowerNV LPC Controller";
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device_class_set_props(dc, pnv_lpc_properties);
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_lpc_info = {
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@ -280,6 +280,7 @@ static void pnv_occ_class_init(ObjectClass *klass, void *data)
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dc->realize = pnv_occ_realize;
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dc->desc = "PowerNV OCC Controller";
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device_class_set_props(dc, pnv_occ_properties);
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_occ_type_info = {
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