hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions

PL011_INT_TX duplicates INT_TX, and PL011_INT_RX INT_RX.
Follow other register fields definitions from this file,
keep the shorter form.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230522153144.30610-6-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-05-22 10:33:53 +02:00
parent 51141cab3b
commit 22f7ff7f23

View File

@ -48,9 +48,6 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
return dev;
}
#define PL011_INT_TX 0x20
#define PL011_INT_RX 0x10
/* Flag Register, UARTFR */
#define PL011_FLAG_TXFE 0x80
#define PL011_FLAG_RXFF 0x40
@ -157,7 +154,7 @@ static uint64_t pl011_read(void *opaque, hwaddr offset,
s->flags |= PL011_FLAG_RXFE;
}
if (s->read_count == s->read_trigger - 1)
s->int_level &= ~ PL011_INT_RX;
s->int_level &= ~ INT_RX;
trace_pl011_read_fifo(s->read_count);
s->rsr = c >> 8;
pl011_update(s);
@ -262,7 +259,7 @@ static void pl011_write(void *opaque, hwaddr offset,
/* XXX this blocks entire thread. Rewrite to use
* qemu_chr_fe_write and background I/O callbacks */
qemu_chr_fe_write_all(&s->chr, &ch, 1);
s->int_level |= PL011_INT_TX;
s->int_level |= INT_TX;
pl011_update(s);
break;
case 1: /* UARTRSR/UARTECR */
@ -350,7 +347,7 @@ static void pl011_put_fifo(void *opaque, uint32_t value)
s->flags |= PL011_FLAG_RXFF;
}
if (s->read_count == s->read_trigger) {
s->int_level |= PL011_INT_RX;
s->int_level |= INT_RX;
pl011_update(s);
}
}