hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions
PL011_INT_TX duplicates INT_TX, and PL011_INT_RX INT_RX. Follow other register fields definitions from this file, keep the shorter form. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230522153144.30610-6-philmd@linaro.org>
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@ -48,9 +48,6 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
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return dev;
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}
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#define PL011_INT_TX 0x20
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#define PL011_INT_RX 0x10
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/* Flag Register, UARTFR */
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#define PL011_FLAG_TXFE 0x80
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#define PL011_FLAG_RXFF 0x40
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@ -157,7 +154,7 @@ static uint64_t pl011_read(void *opaque, hwaddr offset,
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s->flags |= PL011_FLAG_RXFE;
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}
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if (s->read_count == s->read_trigger - 1)
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s->int_level &= ~ PL011_INT_RX;
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s->int_level &= ~ INT_RX;
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trace_pl011_read_fifo(s->read_count);
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s->rsr = c >> 8;
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pl011_update(s);
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@ -262,7 +259,7 @@ static void pl011_write(void *opaque, hwaddr offset,
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/* XXX this blocks entire thread. Rewrite to use
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* qemu_chr_fe_write and background I/O callbacks */
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qemu_chr_fe_write_all(&s->chr, &ch, 1);
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s->int_level |= PL011_INT_TX;
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s->int_level |= INT_TX;
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pl011_update(s);
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break;
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case 1: /* UARTRSR/UARTECR */
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@ -350,7 +347,7 @@ static void pl011_put_fifo(void *opaque, uint32_t value)
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s->flags |= PL011_FLAG_RXFF;
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}
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if (s->read_count == s->read_trigger) {
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s->int_level |= PL011_INT_RX;
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s->int_level |= INT_RX;
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pl011_update(s);
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}
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}
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