pc: acpi: q35: move PRTA routing table into SSDT
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -1631,6 +1631,64 @@ static void build_piix4_pci0_int(Aml *table)
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aml_append(table, sb_scope);
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}
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static void append_q35_prt_entry(Aml *ctx, uint32_t nr, const char *name)
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{
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int i;
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int head;
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Aml *pkg;
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char base = name[3] < 'E' ? 'A' : 'E';
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char *s = g_strdup(name);
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Aml *a_nr = aml_int((nr << 16) | 0xffff);
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assert(strlen(s) == 4);
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head = name[3] - base;
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for (i = 0; i < 4; i++) {
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if (head + i > 3) {
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head = i * -1;
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}
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s[3] = base + head + i;
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pkg = aml_package(4);
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aml_append(pkg, a_nr);
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aml_append(pkg, aml_int(i));
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aml_append(pkg, aml_name("%s", s));
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aml_append(pkg, aml_int(0));
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aml_append(ctx, pkg);
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}
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g_free(s);
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}
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static Aml *build_q35_routing_table(const char *str)
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{
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int i;
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Aml *pkg;
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char *name = g_strdup_printf("%s ", str);
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pkg = aml_package(128);
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for (i = 0; i < 0x18; i++) {
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name[3] = 'E' + (i & 0x3);
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append_q35_prt_entry(pkg, i, name);
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}
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name[3] = 'E';
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append_q35_prt_entry(pkg, 0x18, name);
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/* INTA -> PIRQA for slot 25 - 31, see the default value of D<N>IR */
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for (i = 0x0019; i < 0x1e; i++) {
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name[3] = 'A';
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append_q35_prt_entry(pkg, i, name);
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}
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/* PCIe->PCI bridge. use PIRQ[E-H] */
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name[3] = 'E';
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append_q35_prt_entry(pkg, 0x1e, name);
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name[3] = 'A';
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append_q35_prt_entry(pkg, 0x1f, name);
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g_free(name);
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return pkg;
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}
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static void build_q35_pci0_int(Aml *table)
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{
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Aml *field;
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@ -1638,6 +1696,9 @@ static void build_q35_pci0_int(Aml *table)
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Aml *sb_scope = aml_scope("_SB");
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Aml *pci0_scope = aml_scope("PCI0");
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aml_append(pci0_scope,
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aml_name_decl("PRTA", build_q35_routing_table("GSI")));
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method = aml_method("_PRT", 0, AML_NOTSERIALIZED);
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{
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Aml *if_ctx;
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@ -181,63 +181,6 @@ DefinitionBlock (
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prt_slot_lnkA(0x001f)
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})
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#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \
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Package() { nr##ffff, 0, gsi0, 0 }, \
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Package() { nr##ffff, 1, gsi1, 0 }, \
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Package() { nr##ffff, 2, gsi2, 0 }, \
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Package() { nr##ffff, 3, gsi3, 0 }
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#define prt_slot_gsiA(nr) prt_slot_gsi(nr, GSIA, GSIB, GSIC, GSID)
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#define prt_slot_gsiB(nr) prt_slot_gsi(nr, GSIB, GSIC, GSID, GSIA)
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#define prt_slot_gsiC(nr) prt_slot_gsi(nr, GSIC, GSID, GSIA, GSIB)
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#define prt_slot_gsiD(nr) prt_slot_gsi(nr, GSID, GSIA, GSIB, GSIC)
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#define prt_slot_gsiE(nr) prt_slot_gsi(nr, GSIE, GSIF, GSIG, GSIH)
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#define prt_slot_gsiF(nr) prt_slot_gsi(nr, GSIF, GSIG, GSIH, GSIE)
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#define prt_slot_gsiG(nr) prt_slot_gsi(nr, GSIG, GSIH, GSIE, GSIF)
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#define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG)
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Name(PRTA, package() {
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prt_slot_gsiE(0x0000),
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prt_slot_gsiF(0x0001),
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prt_slot_gsiG(0x0002),
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prt_slot_gsiH(0x0003),
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prt_slot_gsiE(0x0004),
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prt_slot_gsiF(0x0005),
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prt_slot_gsiG(0x0006),
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prt_slot_gsiH(0x0007),
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prt_slot_gsiE(0x0008),
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prt_slot_gsiF(0x0009),
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prt_slot_gsiG(0x000a),
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prt_slot_gsiH(0x000b),
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prt_slot_gsiE(0x000c),
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prt_slot_gsiF(0x000d),
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prt_slot_gsiG(0x000e),
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prt_slot_gsiH(0x000f),
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prt_slot_gsiE(0x0010),
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prt_slot_gsiF(0x0011),
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prt_slot_gsiG(0x0012),
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prt_slot_gsiH(0x0013),
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prt_slot_gsiE(0x0014),
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prt_slot_gsiF(0x0015),
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prt_slot_gsiG(0x0016),
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prt_slot_gsiH(0x0017),
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prt_slot_gsiE(0x0018),
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/* INTA -> PIRQA for slot 25 - 31, but 30
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see the default value of D<N>IR */
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prt_slot_gsiA(0x0019),
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prt_slot_gsiA(0x001a),
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prt_slot_gsiA(0x001b),
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prt_slot_gsiA(0x001c),
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prt_slot_gsiA(0x001d),
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/* PCIe->PCI bridge. use PIRQ[E-H] */
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prt_slot_gsiE(0x001e),
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prt_slot_gsiA(0x001f)
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})
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}
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External(LNKA, DeviceObj)
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