target/ppc: fold ppc_store_ptcr into it's only caller
ppc_store_ptcr, defined in mmu_helper.c, was only used by helper_store_ptcr, in misc_helper.c. To avoid possible confusion, the function was folded into the helper. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210526143516.125582-1-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -1290,7 +1290,6 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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#if !defined(CONFIG_USER_ONLY)
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void ppc_store_sdr1(CPUPPCState *env, target_ulong value);
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void ppc_store_ptcr(CPUPPCState *env, target_ulong value);
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#endif /* !defined(CONFIG_USER_ONLY) */
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void ppc_store_msr(CPUPPCState *env, target_ulong value);
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void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val);
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@ -23,6 +23,7 @@
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#include "exec/helper-proto.h"
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#include "qemu/error-report.h"
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#include "qemu/main-loop.h"
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#include "mmu-book3s-v3.h"
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#include "helper_regs.h"
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@ -116,7 +117,28 @@ void helper_store_sdr1(CPUPPCState *env, target_ulong val)
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void helper_store_ptcr(CPUPPCState *env, target_ulong val)
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{
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if (env->spr[SPR_PTCR] != val) {
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ppc_store_ptcr(env, val);
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PowerPCCPU *cpu = env_archcpu(env);
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target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS;
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target_ulong patbsize = val & PTCR_PATS;
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qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, val);
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assert(!cpu->vhyp);
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assert(env->mmu_model & POWERPC_MMU_3_00);
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if (val & ~ptcr_mask) {
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error_report("Invalid bits 0x"TARGET_FMT_lx" set in PTCR",
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val & ~ptcr_mask);
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val &= ptcr_mask;
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}
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if (patbsize > 24) {
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error_report("Invalid Partition Table size 0x" TARGET_FMT_lx
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" stored in PTCR", patbsize);
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return;
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}
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env->spr[SPR_PTCR] = val;
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tlb_flush(env_cpu(env));
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}
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}
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@ -2030,34 +2030,6 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr)
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/*****************************************************************************/
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/* Special registers manipulation */
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#if defined(TARGET_PPC64)
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void ppc_store_ptcr(CPUPPCState *env, target_ulong value)
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{
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PowerPCCPU *cpu = env_archcpu(env);
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target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS;
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target_ulong patbsize = value & PTCR_PATS;
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qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, value);
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assert(!cpu->vhyp);
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assert(env->mmu_model & POWERPC_MMU_3_00);
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if (value & ~ptcr_mask) {
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error_report("Invalid bits 0x"TARGET_FMT_lx" set in PTCR",
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value & ~ptcr_mask);
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value &= ptcr_mask;
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}
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if (patbsize > 24) {
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error_report("Invalid Partition Table size 0x" TARGET_FMT_lx
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" stored in PTCR", patbsize);
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return;
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}
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env->spr[SPR_PTCR] = value;
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}
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#endif /* defined(TARGET_PPC64) */
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/* Segment registers load and store */
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target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num)
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