Fix compiler warnings

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162

hw/esp.c

@@ -41,7 +41,7 @@
 #define DPRINTF(fmt, args...) \
 do { printf("ESP: " fmt , ##args); } while (0)
 #else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, args...) do {} while (0)
 #endif
 
 #define ESP_REGS 16
@@ -57,13 +57,13 @@ struct ESPState {
     int32_t ti_size;
     uint32_t ti_rptr, ti_wptr;
     uint8_t ti_buf[TI_BUFSZ];
-    int sense;
+    uint32_t sense;
-    int dma;
+    uint32_t dma;
     SCSIDevice *scsi_dev[ESP_MAX_DEVS];
     SCSIDevice *current_dev;
     uint8_t cmdbuf[TI_BUFSZ];
-    int cmdlen;
+    uint32_t cmdlen;
-    int do_cmd;
+    uint32_t do_cmd;
 
     /* The amount of data left in the current DMA transfer.  */
     uint32_t dma_left;
@@ -159,7 +159,7 @@ static void esp_lower_irq(ESPState *s)
     }
 }
 
-static int get_cmd(ESPState *s, uint8_t *buf)
+static uint32_t get_cmd(ESPState *s, uint8_t *buf)
 {
     uint32_t dmalen;
     int target;

hw/iommu.c

@@ -252,8 +252,7 @@ static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr)
     return ret;
 }
 
-static target_phys_addr_t iommu_translate_pa(IOMMUState *s,
+static target_phys_addr_t iommu_translate_pa(target_phys_addr_t addr,
-                                             target_phys_addr_t addr,
                                              uint32_t pte)
 {
     uint32_t tmppte;
@@ -296,7 +295,7 @@ void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
             iommu_bad_addr(opaque, page, is_write);
             return;
         }
-        phys_addr = iommu_translate_pa(opaque, addr, flags);
+        phys_addr = iommu_translate_pa(addr, flags);
         if (is_write) {
             if (!(flags & IOPTE_WRITE)) {
                 iommu_bad_addr(opaque, page, is_write);

hw/slavio_misc.c

@@ -381,10 +381,9 @@ static CPUWriteMemoryFunc *slavio_led_mem_write[3] = {
 static void slavio_misc_save(QEMUFile *f, void *opaque)
 {
     MiscState *s = opaque;
-    int tmp;
+    uint32_t tmp = 0;
     uint8_t tmp8;
 
-    tmp = 0;
     qemu_put_be32s(f, &tmp); /* ignored, was IRQ.  */
     qemu_put_8s(f, &s->config);
     qemu_put_8s(f, &s->aux1);
@@ -398,7 +397,7 @@ static void slavio_misc_save(QEMUFile *f, void *opaque)
 static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
 {
     MiscState *s = opaque;
-    int tmp;
+    uint32_t tmp;
     uint8_t tmp8;
 
     if (version_id != 1)

hw/slavio_serial.c

@@ -92,8 +92,8 @@ typedef struct {
 #define SERIAL_REGS 16
 typedef struct ChannelState {
     qemu_irq irq;
-    int reg;
+    uint32_t reg;
-    int rxint, txint, rxint_under_svc, txint_under_svc;
+    uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
     chn_id_t chn; // this channel, A (base+4) or B (base+0)
     chn_type_t type;
     struct ChannelState *otherchn;
@@ -656,8 +656,8 @@ static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = {
 
 static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s)
 {
-    int tmp;
+    uint32_t tmp = 0;
-    tmp = 0;
+
     qemu_put_be32s(f, &tmp); /* unused, was IRQ.  */
     qemu_put_be32s(f, &s->reg);
     qemu_put_be32s(f, &s->rxint);
@@ -680,7 +680,7 @@ static void slavio_serial_save(QEMUFile *f, void *opaque)
 
 static int slavio_serial_load_chn(QEMUFile *f, ChannelState *s, int version_id)
 {
-    int tmp;
+    uint32_t tmp;
 
     if (version_id > 2)
         return -EINVAL;

hw/slavio_timer.c

@@ -31,7 +31,7 @@
 #define DPRINTF(fmt, args...) \
 do { printf("TIMER: " fmt , ##args); } while (0)
 #else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, args...) do {} while (0)
 #endif
 
 /*
@@ -57,11 +57,11 @@ typedef struct SLAVIO_TIMERState {
     uint32_t count, counthigh, reached;
     uint64_t limit;
     // processor only
-    int running;
+    uint32_t running;
     struct SLAVIO_TIMERState *master;
-    int slave_index;
+    uint32_t slave_index;
     // system only
-    unsigned int num_slaves;
+    uint32_t num_slaves;
     struct SLAVIO_TIMERState *slave[MAX_CPUS];
     uint32_t slave_mode;
 } SLAVIO_TIMERState;
@@ -363,7 +363,7 @@ static void slavio_timer_reset(void *opaque)
 static SLAVIO_TIMERState *slavio_timer_init(target_phys_addr_t addr,
                                             qemu_irq irq,
                                             SLAVIO_TIMERState *master,
-                                            int slave_index)
+                                            uint32_t slave_index)
 {
     int slavio_timer_io_memory;
     SLAVIO_TIMERState *s;

hw/sun4m.c

@@ -32,6 +32,8 @@
 #include "boards.h"
 #include "firmware_abi.h"
 #include "scsi.h"
+#include "pc.h"
+#include "isa.h"
 
 //#define DEBUG_IRQ
 
@@ -123,13 +125,6 @@ struct sun4d_hwdef {
     const char * const default_cpu_model;
 };
 
-/* TSC handling */
-
-uint64_t cpu_get_tsc()
-{
-    return qemu_get_clock(vm_clock);
-}
-
 int DMA_get_channel_mode (int nchan)
 {
     return 0;
@@ -238,13 +233,13 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
 
 static void *slavio_intctl;
 
-void pic_info()
+void pic_info(void)
 {
     if (slavio_intctl)
         slavio_pic_info(slavio_intctl);
 }
 
-void irq_info()
+void irq_info(void)
 {
     if (slavio_intctl)
         slavio_irq_info(slavio_intctl);
@@ -319,7 +314,6 @@ static void secondary_cpu_reset(void *opaque)
 }
 
 static unsigned long sun4m_load_kernel(const char *kernel_filename,
-                                       const char *kernel_cmdline,
                                        const char *initrd_filename)
 {
     int linux_boot;
@@ -384,7 +378,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     int ret;
     char buf[1024];
     BlockDriverState *fd[MAX_FD];
-    int index;
+    int drive_index;
 
     /* init CPUs */
     if (!cpu_model)
@@ -506,9 +500,9 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     if (hwdef->fd_base != (target_phys_addr_t)-1) {
         /* there is zero or one floppy drive */
         memset(fd, 0, sizeof(fd));
-        index = drive_get_index(IF_FLOPPY, 0, 0);
+        drive_index = drive_get_index(IF_FLOPPY, 0, 0);
-        if (index != -1)
+        if (drive_index != -1)
-            fd[0] = drives_table[index].bdrv;
+            fd[0] = drives_table[drive_index].bdrv;
 
         sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
                           fdc_tc);
@@ -524,17 +518,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
                         espdma, *espdma_irq, esp_reset);
 
     for (i = 0; i < ESP_MAX_DEVS; i++) {
-        index = drive_get_index(IF_SCSI, 0, i);
+        drive_index = drive_get_index(IF_SCSI, 0, i);
-        if (index == -1)
+        if (drive_index == -1)
             continue;
-        esp_scsi_attach(main_esp, drives_table[index].bdrv, i);
+        esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
     }
 
     if (hwdef->cs_base != (target_phys_addr_t)-1)
         cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
 
-    kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline,
+    kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename);
-                                    initrd_filename);
 
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
@@ -561,7 +554,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     int ret;
     char buf[1024];
     BlockDriverState *fd[MAX_FD];
-    int index;
+    int drive_index;
 
     /* init CPU */
     if (!cpu_model)
@@ -658,9 +651,9 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
     if (hwdef->fd_base != (target_phys_addr_t)-1) {
         /* there is zero or one floppy drive */
         fd[1] = fd[0] = NULL;
-        index = drive_get_index(IF_FLOPPY, 0, 0);
+        drive_index = drive_get_index(IF_FLOPPY, 0, 0);
-        if (index != -1)
+        if (drive_index != -1)
-            fd[0] = drives_table[index].bdrv;
+            fd[0] = drives_table[drive_index].bdrv;
 
         sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
                           fdc_tc);
@@ -676,14 +669,13 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
                         espdma, *espdma_irq, esp_reset);
 
     for (i = 0; i < ESP_MAX_DEVS; i++) {
-        index = drive_get_index(IF_SCSI, 0, i);
+        drive_index = drive_get_index(IF_SCSI, 0, i);
-        if (index == -1)
+        if (drive_index == -1)
             continue;
-        esp_scsi_attach(main_esp, drives_table[index].bdrv, i);
+        esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
     }
 
-    kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline,
+    kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename);
-                                    initrd_filename);
 
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,
@@ -1366,7 +1358,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
     unsigned long prom_offset, kernel_size;
     int ret;
     char buf[1024];
-    int index;
+    int drive_index;
 
     /* init CPUs */
     if (!cpu_model)
@@ -1478,14 +1470,13 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
                         espdma, *espdma_irq, esp_reset);
 
     for (i = 0; i < ESP_MAX_DEVS; i++) {
-        index = drive_get_index(IF_SCSI, 0, i);
+        drive_index = drive_get_index(IF_SCSI, 0, i);
-        if (index == -1)
+        if (drive_index == -1)
             continue;
-        esp_scsi_attach(main_esp, drives_table[index].bdrv, i);
+        esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
     }
 
-    kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline,
+    kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename);
-                                    initrd_filename);
 
     nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
                boot_device, RAM_size, kernel_size, graphic_width,

hw/sun4m.h

@@ -41,6 +41,8 @@ void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,
 /* sun4c_intctl.c */
 void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq,
                         qemu_irq *parent_irq);
+void sun4c_pic_info(void *opaque);
+void sun4c_irq_info(void *opaque);
 
 /* slavio_timer.c */
 void slavio_timer_init_all(target_phys_addr_t base, qemu_irq master_irq,

hw/sun4u.c

@@ -45,13 +45,6 @@
 #define NVRAM_SIZE           0x2000
 #define MAX_IDE_BUS          2
 
-/* TSC handling */
-
-uint64_t cpu_get_tsc()
-{
-    return qemu_get_clock(vm_clock);
-}
-
 int DMA_get_channel_mode (int nchan)
 {
     return 0;
@@ -164,11 +157,11 @@ static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
     return 0;
 }
 
-void pic_info()
+void pic_info(void)
 {
 }
 
-void irq_info()
+void irq_info(void)
 {
 }
 
@@ -189,21 +182,21 @@ static void main_cpu_reset(void *opaque)
     ptimer_run(env->hstick, 0);
 }
 
-void tick_irq(void *opaque)
+static void tick_irq(void *opaque)
 {
     CPUState *env = opaque;
 
     cpu_interrupt(env, CPU_INTERRUPT_TIMER);
 }
 
-void stick_irq(void *opaque)
+static void stick_irq(void *opaque)
 {
     CPUState *env = opaque;
 
     cpu_interrupt(env, CPU_INTERRUPT_TIMER);
 }
 
-void hstick_irq(void *opaque)
+static void hstick_irq(void *opaque)
 {
     CPUState *env = opaque;
 
@@ -227,7 +220,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 static fdctrl_t *floppy_controller;
 
 /* Sun4u hardware initialisation */
-static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
+static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
                        const char *boot_devices, DisplayState *ds,
                        const char *kernel_filename, const char *kernel_cmdline,
                        const char *initrd_filename, const char *cpu_model)
@@ -241,7 +234,7 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
     PCIBus *pci_bus;
     QEMUBH *bh;
     qemu_irq *irq;
-    int index;
+    int drive_index;
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
 
@@ -271,9 +264,9 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
     main_cpu_reset(env);
 
     /* allocate RAM */
-    cpu_register_physical_memory(0, ram_size, 0);
+    cpu_register_physical_memory(0, RAM_size, 0);
 
-    prom_offset = ram_size + vga_ram_size;
+    prom_offset = RAM_size + vga_ram_size;
     cpu_register_physical_memory(PROM_ADDR,
                                  (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK,
                                  prom_offset | IO_MEM_ROM);
@@ -325,7 +318,7 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
     }
     pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
     isa_mem_base = VGA_BASE;
-    pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + ram_size, ram_size, vga_ram_size);
+    pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size, vga_ram_size);
 
     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
         if (serial_hds[i]) {
@@ -352,9 +345,10 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
         exit(1);
     }
     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
-        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
+        drive_index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS,
-       if (index != -1)
+                                      i % MAX_IDE_DEVS);
-           hd[i] = drives_table[index].bdrv;
+       if (drive_index != -1)
+           hd[i] = drives_table[drive_index].bdrv;
        else
            hd[i] = NULL;
     }
@@ -364,15 +358,15 @@ static void sun4u_init(ram_addr_t ram_size, int vga_ram_size,
     /* FIXME: wire up interrupts.  */
     i8042_init(NULL/*1*/, NULL/*12*/, 0x60);
     for(i = 0; i < MAX_FD; i++) {
-        index = drive_get_index(IF_FLOPPY, 0, i);
+        drive_index = drive_get_index(IF_FLOPPY, 0, i);
-       if (index != -1)
+       if (drive_index != -1)
-           fd[i] = drives_table[index].bdrv;
+           fd[i] = drives_table[drive_index].bdrv;
        else
            fd[i] = NULL;
     }
     floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd);
     nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59);
-    sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_devices,
+    sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", RAM_size, boot_devices,
                          KERNEL_LOAD_ADDR, kernel_size,
                          kernel_cmdline,
                          INITRD_LOAD_ADDR, initrd_size,

hw/tcx.c

@@ -144,7 +144,7 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
     }
 }
 
-static inline int check_dirty(TCXState *ts, ram_addr_t page, ram_addr_t page24,
+static inline int check_dirty(ram_addr_t page, ram_addr_t page24,
                               ram_addr_t cpage)
 {
     int ret;
@@ -279,7 +279,7 @@ static void tcx24_update_display(void *opaque)
 
     for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE,
             page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) {
-        if (check_dirty(ts, page, page24, cpage)) {
+        if (check_dirty(page, page24, cpage)) {
             if (y_start < 0)
                 y_start = y;
             if (page < page_min)

target-sparc/cpu.h

@@ -376,30 +376,30 @@ void cpu_check_irqs(CPUSPARCState *env);
 #define MMU_KERNEL_IDX 1
 #define MMU_HYPV_IDX   2
 
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index(CPUState *env1)
 {
 #if defined(CONFIG_USER_ONLY)
     return MMU_USER_IDX;
 #elif !defined(TARGET_SPARC64)
-    return env->psrs;
+    return env1->psrs;
 #else
-    if (!env->psrs)
+    if (!env1->psrs)
         return MMU_USER_IDX;
-    else if ((env->hpstate & HS_PRIV) == 0)
+    else if ((env1->hpstate & HS_PRIV) == 0)
         return MMU_KERNEL_IDX;
     else
         return MMU_HYPV_IDX;
 #endif
 }
 
-static inline int cpu_fpu_enabled(CPUState *env)
+static inline int cpu_fpu_enabled(CPUState *env1)
 {
 #if defined(CONFIG_USER_ONLY)
     return 1;
 #elif !defined(TARGET_SPARC64)
-    return env->psref;
+    return env1->psref;
 #else
-    return ((env->pstate & PS_PEF) != 0) && ((env->fprs & FPRS_FEF) != 0);
+    return ((env1->pstate & PS_PEF) != 0) && ((env1->fprs & FPRS_FEF) != 0);
 #endif
 }
 

target-sparc/exec.h

@@ -45,15 +45,6 @@ register uint32_t T2 asm(AREG3);
 #include "cpu.h"
 #include "exec-all.h"
 
-void cpu_lock(void);
-void cpu_unlock(void);
-void cpu_loop_exit(void);
-void set_cwp(int new_cwp);
-void do_interrupt(int intno);
-void memcpy32(target_ulong *dst, const target_ulong *src);
-target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
-void dump_mmu(CPUState *env);
-
 static inline void env_to_regs(void)
 {
 #if defined(reg_REGWPTR)
@@ -66,14 +57,14 @@ static inline void regs_to_env(void)
 {
 }
 
-int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
                                int mmu_idx, int is_softmmu);
 
-static inline int cpu_halted(CPUState *env) {
+static inline int cpu_halted(CPUState *env1) {
-    if (!env->halted)
+    if (!env1->halted)
         return 0;
-    if ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->psret != 0)) {
+    if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) {
-        env->halted = 0;
+        env1->halted = 0;
         return 0;
     }
     return EXCP_HALTED;

target-sparc/helper.c

@@ -28,6 +28,7 @@
 #include "cpu.h"
 #include "exec-all.h"
 #include "qemu-common.h"
+#include "helper.h"
 
 //#define DEBUG_MMU
 //#define DEBUG_FEATURES
@@ -35,7 +36,7 @@
 typedef struct sparc_def_t sparc_def_t;
 
 struct sparc_def_t {
-    const unsigned char *name;
+    const char *name;
     target_ulong iu_version;
     uint32_t fpu_version;
     uint32_t mmu_version;
@@ -47,7 +48,7 @@ struct sparc_def_t {
     uint32_t features;
 };
 
-static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model);
+static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
 
 /* Sparc MMU emulation */
 
@@ -67,13 +68,13 @@ void cpu_unlock(void)
 
 #if defined(CONFIG_USER_ONLY)
 
-int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw,
                                int mmu_idx, int is_softmmu)
 {
     if (rw & 2)
-        env->exception_index = TT_TFAULT;
+        env1->exception_index = TT_TFAULT;
     else
-        env->exception_index = TT_DFAULT;
+        env1->exception_index = TT_DFAULT;
     return 1;
 }
 
@@ -387,8 +388,7 @@ void dump_mmu(CPUState *env)
  * UltraSparc IIi I/DMMUs
  */
 static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical, int *prot,
-                          int *access_index, target_ulong address, int rw,
+                                     target_ulong address, int rw, int is_user)
-                          int is_user)
 {
     target_ulong mask;
     unsigned int i;
@@ -447,8 +447,7 @@ static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical
 }
 
 static int get_physical_address_code(CPUState *env, target_phys_addr_t *physical, int *prot,
-                          int *access_index, target_ulong address, int rw,
+                                     target_ulong address, int is_user)
-                          int is_user)
 {
     target_ulong mask;
     unsigned int i;
@@ -509,9 +508,11 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical,
     int is_user = mmu_idx == MMU_USER_IDX;
 
     if (rw == 2)
-        return get_physical_address_code(env, physical, prot, access_index, address, rw, is_user);
+        return get_physical_address_code(env, physical, prot, address,
+                                         is_user);
     else
-        return get_physical_address_data(env, physical, prot, access_index, address, rw, is_user);
+        return get_physical_address_data(env, physical, prot, address, rw,
+                                         is_user);
 }
 
 /* Perform address translation */
@@ -1134,7 +1135,7 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
     fprintf(stderr, "CPU feature %s not found\n", flagname);
 }
 
-static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model)
+static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
 {
     unsigned int i;
     const sparc_def_t *def = NULL;

target-sparc/helper.h

@@ -175,3 +175,12 @@ VIS_CMPHELPER(cmpne);
 #undef F_HELPER_SDQ_0_0
 #undef VIS_HELPER
 #undef VIS_CMPHELPER
+
+void cpu_lock(void);
+void cpu_unlock(void);
+void cpu_loop_exit(void);
+void set_cwp(int new_cwp);
+void do_interrupt(int intno);
+void memcpy32(target_ulong *dst, const target_ulong *src);
+target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
+void dump_mmu(CPUState *env);

target-sparc/op_helper.c

@@ -16,21 +16,21 @@
 #define DPRINTF_MMU(fmt, args...) \
 do { printf("MMU: " fmt , ##args); } while (0)
 #else
-#define DPRINTF_MMU(fmt, args...)
+#define DPRINTF_MMU(fmt, args...) do {} while (0)
 #endif
 
 #ifdef DEBUG_MXCC
 #define DPRINTF_MXCC(fmt, args...) \
 do { printf("MXCC: " fmt , ##args); } while (0)
 #else
-#define DPRINTF_MXCC(fmt, args...)
+#define DPRINTF_MXCC(fmt, args...) do {} while (0)
 #endif
 
 #ifdef DEBUG_ASI
 #define DPRINTF_ASI(fmt, args...) \
 do { printf("ASI: " fmt , ##args); } while (0)
 #else
-#define DPRINTF_ASI(fmt, args...)
+#define DPRINTF_ASI(fmt, args...) do {} while (0)
 #endif
 
 void raise_exception(int tt)

target-sparc/translate.c

@@ -66,9 +66,6 @@ typedef struct DisasContext {
     uint32_t features;
 } DisasContext;
 
-extern FILE *logfile;
-extern int loglevel;
-
 // This function uses non-native bit order
 #define GET_FIELD(X, FROM, TO) \
   ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))