tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec
Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -282,6 +282,10 @@ typedef enum S390Opcode {
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VRRc_VESRAV = 0xe77a,
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VRRc_VESRLV = 0xe778,
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VRRc_VML = 0xe7a2,
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VRRc_VMN = 0xe7fe,
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VRRc_VMNL = 0xe7fc,
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VRRc_VMX = 0xe7ff,
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VRRc_VMXL = 0xe7fd,
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VRRc_VN = 0xe768,
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VRRc_VNC = 0xe769,
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VRRc_VNO = 0xe76b,
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@ -2767,6 +2771,19 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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tcg_out_insn(s, VRRc, VERLLV, a0, a1, a2, vece);
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break;
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case INDEX_op_smin_vec:
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tcg_out_insn(s, VRRc, VMN, a0, a1, a2, vece);
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break;
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case INDEX_op_smax_vec:
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tcg_out_insn(s, VRRc, VMX, a0, a1, a2, vece);
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break;
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case INDEX_op_umin_vec:
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tcg_out_insn(s, VRRc, VMNL, a0, a1, a2, vece);
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break;
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case INDEX_op_umax_vec:
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tcg_out_insn(s, VRRc, VMXL, a0, a1, a2, vece);
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break;
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case INDEX_op_cmp_vec:
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switch ((TCGCond)args[3]) {
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case TCG_COND_EQ:
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@ -2813,7 +2830,11 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
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case INDEX_op_shri_vec:
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case INDEX_op_shrs_vec:
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case INDEX_op_shrv_vec:
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case INDEX_op_smax_vec:
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case INDEX_op_smin_vec:
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case INDEX_op_sub_vec:
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case INDEX_op_umax_vec:
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case INDEX_op_umin_vec:
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case INDEX_op_xor_vec:
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return 1;
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case INDEX_op_cmp_vec:
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@ -3074,6 +3095,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_shlv_vec:
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case INDEX_op_shrv_vec:
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case INDEX_op_sarv_vec:
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case INDEX_op_smax_vec:
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case INDEX_op_smin_vec:
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case INDEX_op_umax_vec:
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case INDEX_op_umin_vec:
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return C_O1_I2(v, v, v);
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case INDEX_op_rotls_vec:
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case INDEX_op_shls_vec:
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@ -156,7 +156,7 @@ extern uint64_t s390_facilities[3];
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#define TCG_TARGET_HAS_shv_vec 1
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#define TCG_TARGET_HAS_mul_vec 1
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#define TCG_TARGET_HAS_sat_vec 0
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#define TCG_TARGET_HAS_minmax_vec 0
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#define TCG_TARGET_HAS_minmax_vec 1
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#define TCG_TARGET_HAS_bitsel_vec 0
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#define TCG_TARGET_HAS_cmpsel_vec 0
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