hw/ppc/ppc440_uc.c: Remove incorrect iothread locking from dcr_write_pcie()
In dcr_write_pcie() we take the iothread lock around a call to pcie_host_mmcfg_udpate(). This is an incorrect attempt to deal with the bug fixed in commit235352ee6e
, where we were not taking the iothread lock before calling device dcr read/write functions. (It's not sufficient locking, because although the other cases in the switch statement won't assert, there is no locking which prevents multiple guest CPUs from trying to access the PPC460EXPCIEState struct at the same time and corrupting data.) Unfortunately with commit235352ee6e
we are now trying to recursively take the iothread lock, which will assert: $ qemu-system-ppc -M sam460ex --display none ** ERROR:/home/petmay01/linaro/qemu-from-laptop/qemu/cpus.c:1830:qemu_mutex_lock_iothread_impl: assertion failed: (!qemu_mutex_iothread_locked()) Aborted (core dumped) Remove the locking within dcr_write_pcie(). Fixes:235352ee6e
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200330125228.24994-1-peter.maydell@linaro.org> Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -13,7 +13,6 @@
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "qemu/log.h"
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#include "qemu/main-loop.h"
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#include "qemu/module.h"
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#include "cpu.h"
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#include "hw/irq.h"
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@ -1183,9 +1182,7 @@ static void dcr_write_pcie(void *opaque, int dcrn, uint32_t val)
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case PEGPL_CFGMSK:
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s->cfg_mask = val;
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size = ~(val & 0xfffffffe) + 1;
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qemu_mutex_lock_iothread();
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pcie_host_mmcfg_update(PCIE_HOST_BRIDGE(s), val & 1, s->cfg_base, size);
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qemu_mutex_unlock_iothread();
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break;
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case PEGPL_MSGBAH:
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s->msg_base = ((uint64_t)val << 32) | (s->msg_base & 0xffffffff);
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