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trivial patches 20200206

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Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging

trivial patches 20200206

# gpg: Signature made Thu 06 Feb 2020 12:49:19 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  MAINTAINERS: Cc the qemu-arm@nongnu.org for the ARM machines
  aspeed/i2c: Prevent uninitialized warning
  hw/pci/pci_bridge: Fix typo in comment
  qemu-img: Place the '-i aio' option in alphabetical order
  qemu-options: replace constant 1 with HAS_ARG
  MAINTAINERS: Cover hppa-softmmu.mak in the HP-PARISC Machines section
  hw/i386/vmmouse: Fix crash when using the vmmouse on a machine without vmport
  hw/bt: Remove empty Kconfig file
  hw/timer/m48t59: Convert debug printf()s to trace events
  MAINTAINERS: update Leif Lindholm's address
  monitor: fix memory leak in monitor_fdset_dup_fd_find_remove
  hw/smbios/smbios: Remove unused include

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-02-06 12:57:54 +00:00
commit 2021b7c971
14 changed files with 37 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.mailmap
View File

@ -44,6 +44,7 @@ Aleksandar Markovic <amarkovic@wavecomp.com> <aleksandar.markovic@imgtec.com>
Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> <arikalo@wavecomp.com>
Anthony Liguori <anthony@codemonkey.ws> Anthony Liguori <aliguori@us.ibm.com>
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
Leif Lindholm <leif@nuviainc.com> <leif.lindholm@linaro.org>
Paul Burton <pburton@wavecomp.com> <paul.burton@mips.com>
Paul Burton <pburton@wavecomp.com> <paul.burton@imgtec.com>
Paul Burton <pburton@wavecomp.com> <paul@archlinuxmips.org>

10
MAINTAINERS
View File

@ -737,7 +737,7 @@ F: include/hw/ssi/imx_spi.h
SBSA-REF
M: Radoslaw Biernacki <radoslaw.biernacki@linaro.org>
M: Peter Maydell <peter.maydell@linaro.org>
R: Leif Lindholm <leif.lindholm@linaro.org>
R: Leif Lindholm <leif@nuviainc.com>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/sbsa-ref.c
@ -809,6 +809,7 @@ F: hw/arm/virt-acpi-build.c
STM32F205
M: Alistair Francis <alistair@alistair23.me>
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/stm32f205_soc.c
F: hw/misc/stm32f2xx_syscfg.c
@ -821,6 +822,7 @@ F: include/hw/*/stm32*.h
STM32F405
M: Alistair Francis <alistair@alistair23.me>
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/stm32f405_soc.c
F: hw/misc/stm32f4xx_syscfg.c
@ -829,18 +831,21 @@ F: hw/misc/stm32f4xx_exti.c
Netduino 2
M: Alistair Francis <alistair@alistair23.me>
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/netduino2.c
Netduino Plus 2
M: Alistair Francis <alistair@alistair23.me>
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/netduinoplus2.c
SmartFusion2
M: Subbaraya Sundeep <sundeep.lkml@gmail.com>
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/msf2-soc.c
F: hw/misc/msf2-sysreg.c
@ -854,6 +859,7 @@ F: include/hw/ssi/mss-spi.h
Emcraft M2S-FG484
M: Subbaraya Sundeep <sundeep.lkml@gmail.com>
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/msf2-som.c
@ -896,6 +902,7 @@ HP B160L
M: Richard Henderson <rth@twiddle.net>
R: Helge Deller <deller@gmx.de>
S: Odd Fixes
F: default-configs/hppa-softmmu.mak
F: hw/hppa/
F: pc-bios/hppa-firmware.img
@ -1401,6 +1408,7 @@ T: git https://github.com/jnsnow/qemu.git ide
OMAP
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/*/omap*
F: include/hw/arm/omap.h

8
docs/interop/qemu-img.rst
View File

@ -247,7 +247,7 @@ Command description:
Amends the image format specific *OPTIONS* for the image file
*FILENAME*. Not all file formats support this operation.
.. option:: bench [-c COUNT] [-d DEPTH] [-f FMT] [--flush-interval=FLUSH_INTERVAL] [-n] [-i AIO] [--no-drain] [-o OFFSET] [--pattern=PATTERN] [-q] [-s BUFFER_SIZE] [-S STEP_SIZE] [-t CACHE] [-w] [-U] FILENAME
.. option:: bench [-c COUNT] [-d DEPTH] [-f FMT] [--flush-interval=FLUSH_INTERVAL] [-i AIO] [-n] [--no-drain] [-o OFFSET] [--pattern=PATTERN] [-q] [-s BUFFER_SIZE] [-S STEP_SIZE] [-t CACHE] [-w] [-U] FILENAME
Run a simple sequential I/O benchmark on the specified image. If ``-w`` is
specified, a write test is performed, otherwise a read test is performed.
@ -264,13 +264,13 @@ Command description:
``--no-drain`` is specified, a flush is issued without draining the request
queue first.
if ``-i`` is specified, *AIO* option can be used to specify different
AIO backends: ``threads``, ``native`` or ``io_uring``.
If ``-n`` is specified, the native AIO backend is used if possible. On
Linux, this option only works if ``-t none`` or ``-t directsync`` is
specified as well.
if ``-i`` is specified, *AIO* option can be used to specify different
AIO backends: ``threads``, ``native`` or ``io_uring``.
For write tests, by default a buffer filled with zeros is written. This can be
overridden with a pattern byte specified by *PATTERN*.

0
hw/bt/Kconfig
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2
hw/i2c/aspeed_i2c.c
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@ -400,7 +400,7 @@ static bool aspeed_i2c_check_sram(AspeedI2CBus *bus)
static void aspeed_i2c_bus_cmd_dump(AspeedI2CBus *bus)
{
g_autofree char *cmd_flags;
g_autofree char *cmd_flags = NULL;
uint32_t count;
if (bus->cmd & (I2CD_RX_BUFF_ENABLE | I2CD_RX_BUFF_ENABLE)) {

6
hw/i386/vmmouse.c
View File

@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "ui/console.h"
#include "hw/i386/pc.h"
#include "hw/input/i8042.h"
@ -269,6 +270,11 @@ static void vmmouse_realizefn(DeviceState *dev, Error **errp)
DPRINTF("vmmouse_init\n");
if (!object_resolve_path_type("", TYPE_VMPORT, NULL)) {
error_setg(errp, "vmmouse needs a machine with vmport");
return;
}
vmport_register(VMMOUSE_STATUS, vmmouse_ioport_read, s);
vmport_register(VMMOUSE_COMMAND, vmmouse_ioport_read, s);
vmport_register(VMMOUSE_DATA, vmmouse_ioport_read, s);

5
hw/rtc/m48t59-internal.h
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@ -26,11 +26,6 @@
#ifndef HW_M48T59_INTERNAL_H
#define HW_M48T59_INTERNAL_H
#define M48T59_DEBUG 0
#define NVRAM_PRINTF(fmt, ...) do { \
if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0)
/*
* The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
* alarm and a watchdog timer and related control registers. In the

11
hw/rtc/m48t59.c
View File

@ -35,6 +35,7 @@
#include "exec/address-spaces.h"
#include "qemu/bcd.h"
#include "qemu/module.h"
#include "trace.h"
#include "m48t59-internal.h"
#include "migration/vmstate.h"
@ -192,8 +193,7 @@ void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val)
struct tm tm;
int tmp;
if (addr > 0x1FF8 && addr < 0x2000)
NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val);
trace_m48txx_nvram_mem_write(addr, val);
/* check for NVRAM access */
if ((NVRAM->model == 2 && addr < 0x7f8) ||
@ -450,8 +450,7 @@ uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr)
}
break;
}
if (addr > 0x1FF9 && addr < 0x2000)
NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval);
trace_m48txx_nvram_mem_read(addr, retval);
return retval;
}
@ -462,7 +461,7 @@ static void NVRAM_writeb(void *opaque, hwaddr addr, uint64_t val,
{
M48t59State *NVRAM = opaque;
NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" => 0x%"PRIx64"\n", __func__, addr, val);
trace_m48txx_nvram_io_write(addr, val);
switch (addr) {
case 0:
NVRAM->addr &= ~0x00FF;
@ -494,7 +493,7 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
retval = -1;
break;
}
NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" <= 0x%08x\n", __func__, addr, retval);
trace_m48txx_nvram_io_read(addr, retval);
return retval;
}

6
hw/rtc/trace-events
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@ -17,3 +17,9 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
# aspeed-rtc.c
aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
# m48t59.c
m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64
m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"

1
hw/smbios/smbios.c
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@ -24,7 +24,6 @@
#include "qemu/option.h"
#include "sysemu/sysemu.h"
#include "qemu/uuid.h"
#include "sysemu/cpus.h"
#include "hw/firmware/smbios.h"
#include "hw/loader.h"
#include "hw/boards.h"

2
include/hw/pci/pci_bridge.h
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@ -108,7 +108,7 @@ void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev,
/*
* before qdev initialization(qdev_init()), this function sets bus_name and
* map_irq callback which are necessry for pci_bridge_initfn() to
* map_irq callback which are necessary for pci_bridge_initfn() to
* initialize bus.
*/
void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,

1
monitor/misc.c
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@ -1749,6 +1749,7 @@ static int64_t monitor_fdset_dup_fd_find_remove(int dup_fd, bool remove)
if (mon_fdset_fd_dup->fd == dup_fd) {
if (remove) {
QLIST_REMOVE(mon_fdset_fd_dup, next);
g_free(mon_fdset_fd_dup);
if (QLIST_EMPTY(&mon_fdset->dup_fds)) {
monitor_fdset_cleanup(mon_fdset);
}

4
qemu-img-cmds.hx
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@ -16,9 +16,9 @@ SRST
ERST
DEF("bench", img_bench,
"bench [-c count] [-d depth] [-f fmt] [--flush-interval=flush_interval] [-n] [--no-drain] [-o offset] [--pattern=pattern] [-q] [-s buffer_size] [-S step_size] [-t cache] [-i aio] [-w] [-U] filename")
"bench [-c count] [-d depth] [-f fmt] [--flush-interval=flush_interval] [-i aio] [-n] [--no-drain] [-o offset] [--pattern=pattern] [-q] [-s buffer_size] [-S step_size] [-t cache] [-w] [-U] filename")
SRST
.. option:: bench [-c COUNT] [-d DEPTH] [-f FMT] [--flush-interval=FLUSH_INTERVAL] [-n] [--no-drain] [-o OFFSET] [--pattern=PATTERN] [-q] [-s BUFFER_SIZE] [-S STEP_SIZE] [-t CACHE] [-i AIO] [-w] [-U] FILENAME
.. option:: bench [-c COUNT] [-d DEPTH] [-f FMT] [--flush-interval=FLUSH_INTERVAL] [-i AIO] [-n] [--no-drain] [-o OFFSET] [--pattern=PATTERN] [-q] [-s BUFFER_SIZE] [-S STEP_SIZE] [-t CACHE] [-w] [-U] FILENAME
ERST
DEF("check", img_check,
"check [--object objectdef] [--image-opts] [-q] [-f fmt] [--output=ofmt] [-r [leaks | all]] [-T src_cache] [-U] filename")

2
qemu-options.hx
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@ -1955,7 +1955,7 @@ STEXI
Start in full screen.
ETEXI
DEF("g", 1, QEMU_OPTION_g ,
DEF("g", HAS_ARG, QEMU_OPTION_g ,
"-g WxH[xDEPTH] Set the initial graphical resolution and depth\n",
QEMU_ARCH_PPC | QEMU_ARCH_SPARC | QEMU_ARCH_M68K)
STEXI