From 1ff68783f6e94b3c1ab909f92911a04d7183241c Mon Sep 17 00:00:00 2001 From: Amithash Prasad Date: Wed, 25 Sep 2019 16:32:26 +0200 Subject: [PATCH] aspeed/wdt: Check correct register for clock source MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When WDT_RESTART is written, the data is not the contents of the WDT_CTRL register. Hence ensure we are looking at WDT_CTRL to check if bit WDT_CTRL_1MHZ_CLK is set or not. Signed-off-by: Amithash Prasad Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater Message-id: 20190925143248.10000-2-clg@kaod.org [clg: improved Suject prefix ] Signed-off-by: Cédric Le Goater Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater Signed-off-by: Peter Maydell --- hw/watchdog/wdt_aspeed.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index 9b93213417..f710036535 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -140,7 +140,7 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, case WDT_RESTART: if ((data & 0xFFFF) == WDT_RESTART_MAGIC) { s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE]; - aspeed_wdt_reload(s, !(data & WDT_CTRL_1MHZ_CLK)); + aspeed_wdt_reload(s, !(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK)); } break; case WDT_CTRL: