ppc: remove idle_timer logic
The logic is broken for multiple vcpu guests, also causing memory leak. The logic is in place to handle kvm not having KVM_CAP_PPC_IRQ_LEVEL, which is part of the kernel now since 2.6.37. Instead of fixing the leak, drop the redundant logic which is not excercised on new kernels anymore. Exit with error on older kernels. Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Message-Id: <156406409479.19996.7606556689856621111.stgit@lep8c.aus.stglabs.ibm.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -58,7 +58,6 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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};
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};
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static int cap_interrupt_unset;
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static int cap_interrupt_unset;
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static int cap_interrupt_level;
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static int cap_segstate;
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static int cap_segstate;
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static int cap_booke_sregs;
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static int cap_booke_sregs;
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static int cap_ppc_smt;
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static int cap_ppc_smt;
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@ -89,25 +88,6 @@ static int cap_large_decr;
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static uint32_t debug_inst_opcode;
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static uint32_t debug_inst_opcode;
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/*
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* XXX We have a race condition where we actually have a level triggered
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* interrupt, but the infrastructure can't expose that yet, so the guest
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* takes but ignores it, goes to sleep and never gets notified that there's
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* still an interrupt pending.
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*
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* As a quick workaround, let's just wake up again 20 ms after we injected
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* an interrupt. That way we can assure that we're always reinjecting
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* interrupts in case the guest swallowed them.
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*/
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static QEMUTimer *idle_timer;
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static void kvm_kick_cpu(void *opaque)
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{
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PowerPCCPU *cpu = opaque;
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qemu_cpu_kick(CPU(cpu));
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}
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/*
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/*
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* Check whether we are running with KVM-PR (instead of KVM-HV). This
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* Check whether we are running with KVM-PR (instead of KVM-HV). This
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* should only be used for fallback tests - generally we should use
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* should only be used for fallback tests - generally we should use
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@ -127,7 +107,6 @@ static int kvmppc_get_dec_bits(void);
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int kvm_arch_init(MachineState *ms, KVMState *s)
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int kvm_arch_init(MachineState *ms, KVMState *s)
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{
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{
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cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ);
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cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ);
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cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL);
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cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE);
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cap_segstate = kvm_check_extension(s, KVM_CAP_PPC_SEGSTATE);
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cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS);
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cap_booke_sregs = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_SREGS);
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cap_ppc_smt_possible = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT_POSSIBLE);
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cap_ppc_smt_possible = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT_POSSIBLE);
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@ -163,9 +142,9 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
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*/
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*/
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cap_ppc_pvr_compat = false;
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cap_ppc_pvr_compat = false;
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if (!cap_interrupt_level) {
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if (!kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL)) {
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fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
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error_report("KVM: Host kernel doesn't have level irq capability");
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"VM to stall at times!\n");
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exit(1);
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}
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}
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kvm_ppc_register_host_cpu_type(ms);
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kvm_ppc_register_host_cpu_type(ms);
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@ -493,8 +472,6 @@ int kvm_arch_init_vcpu(CPUState *cs)
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return ret;
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return ret;
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}
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}
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idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, kvm_kick_cpu, cpu);
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switch (cenv->mmu_model) {
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switch (cenv->mmu_model) {
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case POWERPC_MMU_BOOKE206:
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case POWERPC_MMU_BOOKE206:
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/* This target supports access to KVM's guest TLB */
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/* This target supports access to KVM's guest TLB */
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@ -1334,7 +1311,7 @@ int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
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return 0;
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return 0;
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}
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}
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if (!kvm_enabled() || !cap_interrupt_unset || !cap_interrupt_level) {
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if (!kvm_enabled() || !cap_interrupt_unset) {
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return 0;
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return 0;
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}
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}
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@ -1351,49 +1328,7 @@ int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
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void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
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void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
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{
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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return;
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CPUPPCState *env = &cpu->env;
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int r;
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unsigned irq;
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qemu_mutex_lock_iothread();
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/*
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* PowerPC QEMU tracks the various core input pins (interrupt,
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* critical interrupt, reset, etc) in PPC-specific
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* env->irq_input_state.
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*/
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if (!cap_interrupt_level &&
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run->ready_for_interrupt_injection &&
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(cs->interrupt_request & CPU_INTERRUPT_HARD) &&
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(env->irq_input_state & (1 << PPC_INPUT_INT)))
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{
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/*
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* For now KVM disregards the 'irq' argument. However, in the
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* future KVM could cache it in-kernel to avoid a heavyweight
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* exit when reading the UIC.
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*/
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irq = KVM_INTERRUPT_SET;
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trace_kvm_injected_interrupt(irq);
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r = kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &irq);
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if (r < 0) {
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printf("cpu %d fail inject %x\n", cs->cpu_index, irq);
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}
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/* Always wake up soon in case the interrupt was level based */
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timer_mod(idle_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
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(NANOSECONDS_PER_SECOND / 50));
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}
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/*
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* We don't know if there are more interrupts pending after
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* this. However, the guest will return to userspace in the course
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* of handling this one anyways, so we will get a chance to
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* deliver the rest.
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*/
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qemu_mutex_unlock_iothread();
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}
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}
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MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
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MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
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