aspeed: Introduce helper for 32-bit hosts limitation
On 32-bit hosts, RAM has a 2047 MB limit. Use a macro to define the default ram size of machines (AST2600 SoC) that can have 2 GB. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -47,6 +47,13 @@ struct AspeedMachineState {
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char *spi_model;
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};
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/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
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#if HOST_LONG_BITS == 32
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#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
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#else
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#define ASPEED_RAM_SIZE(sz) (sz)
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#endif
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/* Palmetto hardware value: 0x120CE416 */
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#define PALMETTO_BMC_HW_STRAP1 ( \
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SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
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@ -1423,12 +1430,7 @@ static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
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aspeed_soc_num_cpus(amc->soc_name);
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};
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/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
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#if HOST_LONG_BITS == 32
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#define FUJI_BMC_RAM_SIZE (1 * GiB)
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#else
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#define FUJI_BMC_RAM_SIZE (2 * GiB)
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#endif
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#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
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static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
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{
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@ -1450,12 +1452,7 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
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aspeed_soc_num_cpus(amc->soc_name);
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};
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/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
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#if HOST_LONG_BITS == 32
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#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
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#else
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#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
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#endif
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#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
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static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
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{
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