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target/i386: support operand merging in binary scalar helpers

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Compared to Paul's implementation, the new decoder will use a different approach
to implement AVX's merging of dst with src1 on scalar operations.  Adjust the
helpers to provide this functionality.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2022-09-09 11:08:18 +02:00
parent f05f9789f5
commit 1de9e7e612
1 changed files with 16 additions and 0 deletions
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16
target/i386/ops_sse.h
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@ -557,12 +557,20 @@ void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order)
\ \
void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s)\ void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s)\
{ \ { \
int i; \
d->ZMM_S(0) = F(32, v->ZMM_S(0), s->ZMM_S(0)); \ d->ZMM_S(0) = F(32, v->ZMM_S(0), s->ZMM_S(0)); \
for (i = 1; i < 2 << SHIFT; i++) { \
d->ZMM_L(i) = v->ZMM_L(i); \
} \
} \ } \
\ \
void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s)\ void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s)\
{ \ { \
int i; \
d->ZMM_D(0) = F(64, v->ZMM_D(0), s->ZMM_D(0)); \ d->ZMM_D(0) = F(64, v->ZMM_D(0), s->ZMM_D(0)); \
for (i = 1; i < 1 << SHIFT; i++) { \
d->ZMM_Q(i) = v->ZMM_Q(i); \
} \
} }
#else #else
@ -1027,12 +1035,20 @@ void glue(helper_addsubpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s)
SSE_HELPER_CMP_P(name, F, C) \ SSE_HELPER_CMP_P(name, F, C) \
void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *v, Reg *s) \
{ \ { \
int i; \
d->ZMM_L(0) = C(F(32, v->ZMM_S(0), s->ZMM_S(0))) ? -1 : 0; \ d->ZMM_L(0) = C(F(32, v->ZMM_S(0), s->ZMM_S(0))) ? -1 : 0; \
for (i = 1; i < 2 << SHIFT; i++) { \
d->ZMM_L(i) = v->ZMM_L(i); \
} \
} \ } \
\ \
void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s) \ void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *v, Reg *s) \
{ \ { \
int i; \
d->ZMM_Q(0) = C(F(64, v->ZMM_D(0), s->ZMM_D(0))) ? -1 : 0; \ d->ZMM_Q(0) = C(F(64, v->ZMM_D(0), s->ZMM_D(0))) ? -1 : 0; \
for (i = 1; i < 1 << SHIFT; i++) { \
d->ZMM_Q(i) = v->ZMM_Q(i); \
} \
} }
#define FPU_EQ(x) (x == float_relation_equal) #define FPU_EQ(x) (x == float_relation_equal)