target-xtensa: implement SIMCALL
Tensilica iss provides support for applications running in freestanding environment through SIMCALL command. It is used by Tensilica libc to access argc/argv, for file I/O, etc. Note that simcalls that accept buffer addresses expect virtual addresses. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Max Filippov
Blue Swirl
parent
5b4e481b04
commit
1ddeaa5d42
@ -370,6 +370,7 @@ obj-alpha-y += vga.o cirrus_vga.o
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obj-xtensa-y += xtensa_pic.o
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obj-xtensa-y += xtensa_sample.o
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obj-xtensa-y += xtensa-semi.o
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main.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
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@ -2396,11 +2396,11 @@ STEXI
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Set OpenBIOS nvram @var{variable} to given @var{value} (PPC, SPARC only).
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ETEXI
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DEF("semihosting", 0, QEMU_OPTION_semihosting,
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"-semihosting semihosting mode\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K)
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"-semihosting semihosting mode\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA)
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STEXI
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@item -semihosting
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@findex -semihosting
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Semihosting mode (ARM, M68K only).
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Semihosting mode (ARM, M68K, Xtensa only).
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ETEXI
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DEF("old-param", 0, QEMU_OPTION_old_param,
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"-old-param old param mode\n", QEMU_ARCH_ARM)
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@ -14,6 +14,7 @@ DEF_HELPER_0(restore_owb, void)
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DEF_HELPER_1(movsp, void, i32)
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DEF_HELPER_1(wsr_lbeg, void, i32)
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DEF_HELPER_1(wsr_lend, void, i32)
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DEF_HELPER_1(simcall, void, env)
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DEF_HELPER_0(dump_state, void)
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#include "def-helper.h"
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@ -35,6 +35,7 @@
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#include "disas.h"
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#include "tcg-op.h"
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#include "qemu-log.h"
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#include "sysemu.h"
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#include "helpers.h"
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#define GEN_HELPER 1
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@ -726,7 +727,13 @@ static void disas_xtensa_insn(DisasContext *dc)
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break;
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case 1: /*SIMCALL*/
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TBD();
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if (semihosting_enabled) {
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gen_check_privilege(dc);
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gen_helper_simcall(cpu_env);
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} else {
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qemu_log("SIMCALL but semihosting is disabled\n");
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gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
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}
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break;
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default:
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224
xtensa-semi.c
Normal file
224
xtensa-semi.c
Normal file
@ -0,0 +1,224 @@
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/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <errno.h>
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#include <unistd.h>
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#include <string.h>
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#include <stddef.h>
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#include "cpu.h"
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#include "dyngen-exec.h"
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#include "helpers.h"
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#include "qemu-log.h"
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enum {
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TARGET_SYS_exit = 1,
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TARGET_SYS_read = 3,
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TARGET_SYS_write = 4,
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TARGET_SYS_open = 5,
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TARGET_SYS_close = 6,
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TARGET_SYS_lseek = 19,
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TARGET_SYS_select_one = 29,
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TARGET_SYS_argc = 1000,
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TARGET_SYS_argv_sz = 1001,
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TARGET_SYS_argv = 1002,
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TARGET_SYS_memset = 1004,
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};
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enum {
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SELECT_ONE_READ = 1,
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SELECT_ONE_WRITE = 2,
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SELECT_ONE_EXCEPT = 3,
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};
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void HELPER(simcall)(CPUState *env)
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{
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uint32_t *regs = env->regs;
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switch (regs[2]) {
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case TARGET_SYS_exit:
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qemu_log("exit(%d) simcall\n", regs[3]);
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exit(regs[3]);
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break;
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case TARGET_SYS_read:
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case TARGET_SYS_write:
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{
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bool is_write = regs[2] == TARGET_SYS_write;
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uint32_t fd = regs[3];
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uint32_t vaddr = regs[4];
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uint32_t len = regs[5];
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while (len > 0) {
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target_phys_addr_t paddr =
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cpu_get_phys_page_debug(env, vaddr);
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uint32_t page_left =
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TARGET_PAGE_SIZE - (vaddr & (TARGET_PAGE_SIZE - 1));
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uint32_t io_sz = page_left < len ? page_left : len;
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target_phys_addr_t sz = io_sz;
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void *buf = cpu_physical_memory_map(paddr, &sz, is_write);
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if (buf) {
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vaddr += io_sz;
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len -= io_sz;
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regs[2] = is_write ?
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write(fd, buf, io_sz) :
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read(fd, buf, io_sz);
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regs[3] = errno;
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cpu_physical_memory_unmap(buf, sz, is_write, sz);
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if (regs[2] == -1) {
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break;
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}
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} else {
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regs[2] = -1;
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regs[3] = EINVAL;
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break;
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}
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}
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}
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break;
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case TARGET_SYS_open:
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{
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char name[1024];
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int rc;
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int i;
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for (i = 0; i < ARRAY_SIZE(name); ++i) {
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rc = cpu_memory_rw_debug(
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env, regs[3] + i, (uint8_t *)name + i, 1, 0);
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if (rc != 0 || name[i] == 0) {
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break;
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}
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}
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if (rc == 0 && i < ARRAY_SIZE(name)) {
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regs[2] = open(name, regs[4], regs[5]);
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regs[3] = errno;
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} else {
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regs[2] = -1;
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regs[3] = EINVAL;
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}
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}
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break;
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case TARGET_SYS_close:
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if (regs[3] < 3) {
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regs[2] = regs[3] = 0;
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} else {
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regs[2] = close(regs[3]);
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regs[3] = errno;
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}
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break;
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case TARGET_SYS_lseek:
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regs[2] = lseek(regs[3], (off_t)(int32_t)regs[4], regs[5]);
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regs[3] = errno;
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break;
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case TARGET_SYS_select_one:
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{
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uint32_t fd = regs[3];
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uint32_t rq = regs[4];
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uint32_t target_tv = regs[5];
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uint32_t target_tvv[2];
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struct timeval tv = {0};
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fd_set fdset;
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FD_ZERO(&fdset);
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FD_SET(fd, &fdset);
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if (target_tv) {
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cpu_memory_rw_debug(env, target_tv,
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(uint8_t *)target_tvv, sizeof(target_tvv), 0);
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tv.tv_sec = (int32_t)tswap32(target_tvv[0]);
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tv.tv_usec = (int32_t)tswap32(target_tvv[1]);
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}
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regs[2] = select(fd + 1,
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rq == SELECT_ONE_READ ? &fdset : NULL,
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rq == SELECT_ONE_WRITE ? &fdset : NULL,
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rq == SELECT_ONE_EXCEPT ? &fdset : NULL,
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target_tv ? &tv : NULL);
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regs[3] = errno;
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}
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break;
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case TARGET_SYS_argc:
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regs[2] = 1;
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regs[3] = 0;
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break;
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case TARGET_SYS_argv_sz:
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regs[2] = 128;
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regs[3] = 0;
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break;
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case TARGET_SYS_argv:
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{
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struct Argv {
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uint32_t argptr[2];
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char text[120];
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} argv = {
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{0, 0},
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"test"
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};
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argv.argptr[0] = tswap32(regs[3] + offsetof(struct Argv, text));
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cpu_memory_rw_debug(
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env, regs[3], (uint8_t *)&argv, sizeof(argv), 1);
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}
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break;
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case TARGET_SYS_memset:
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{
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uint32_t base = regs[3];
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uint32_t sz = regs[5];
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while (sz) {
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target_phys_addr_t len = sz;
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void *buf = cpu_physical_memory_map(base, &len, 1);
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if (buf && len) {
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memset(buf, regs[4], len);
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cpu_physical_memory_unmap(buf, len, 1, len);
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} else {
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len = 1;
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}
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base += len;
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sz -= len;
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}
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regs[2] = regs[3];
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regs[3] = 0;
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}
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break;
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default:
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qemu_log("%s(%d): not implemented\n", __func__, regs[2]);
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break;
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}
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}
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