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target/s390x: Use explicit big-endian LD/ST API

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The S390X architecture uses big endianness. Directly use
the big-endian LD/ST API.

Mechanical change using:

  $ end=be; \
    for acc in uw w l q tul; do \
      sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \
             -e "s/st${acc}_p(/st${acc}_${end}_p(/" \
        $(git grep -wlE '(ld|st)t?u?[wlq]_p' target/s390x/); \
    done

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20241004163042.85922-24-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2024-10-04 13:30:39 -03:00 committed by Thomas Huth
parent a0bc3cefe2
commit 1d94eafdb5
2 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
target/s390x/gdbstub.c
View File

@ -46,7 +46,7 @@ int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
CPUS390XState *env = cpu_env(cs);
target_ulong tmpl = ldq_p(mem_buf);
target_ulong tmpl = ldq_be_p(mem_buf);
switch (n) {
case S390_PSWM_REGNUM:
@ -88,7 +88,7 @@ static int cpu_write_ac_reg(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case S390_A0_REGNUM ... S390_A15_REGNUM:
env->aregs[n] = ldl_p(mem_buf);
env->aregs[n] = ldl_be_p(mem_buf);
cpu_synchronize_post_init(env_cpu(env));
return 4;
default:
@ -123,10 +123,10 @@ static int cpu_write_fp_reg(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case S390_FPC_REGNUM:
env->fpc = ldl_p(mem_buf);
env->fpc = ldl_be_p(mem_buf);
return 4;
case S390_F0_REGNUM ... S390_F15_REGNUM:
*get_freg(env, n - S390_F0_REGNUM) = ldq_p(mem_buf);
*get_freg(env, n - S390_F0_REGNUM) = ldq_be_p(mem_buf);
return 8;
default:
return 0;
@ -167,11 +167,11 @@ static int cpu_write_vreg(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case S390_V0L_REGNUM ... S390_V15L_REGNUM:
env->vregs[n][1] = ldq_p(mem_buf + 8);
env->vregs[n][1] = ldq_be_p(mem_buf + 8);
return 8;
case S390_V16_REGNUM ... S390_V31_REGNUM:
env->vregs[n][0] = ldq_p(mem_buf);
env->vregs[n][1] = ldq_p(mem_buf + 8);
env->vregs[n][0] = ldq_be_p(mem_buf);
env->vregs[n][1] = ldq_be_p(mem_buf + 8);
return 16;
default:
return 0;
@ -203,7 +203,7 @@ static int cpu_write_c_reg(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case S390_C0_REGNUM ... S390_C15_REGNUM:
env->cregs[n] = ldq_p(mem_buf);
env->cregs[n] = ldq_be_p(mem_buf);
if (tcg_enabled()) {
tlb_flush(env_cpu(env));
}
@ -246,19 +246,19 @@ static int cpu_write_virt_reg(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case S390_VIRT_CKC_REGNUM:
env->ckc = ldq_p(mem_buf);
env->ckc = ldq_be_p(mem_buf);
cpu_synchronize_post_init(cs);
return 8;
case S390_VIRT_CPUTM_REGNUM:
env->cputm = ldq_p(mem_buf);
env->cputm = ldq_be_p(mem_buf);
cpu_synchronize_post_init(cs);
return 8;
case S390_VIRT_BEA_REGNUM:
env->gbea = ldq_p(mem_buf);
env->gbea = ldq_be_p(mem_buf);
cpu_synchronize_post_init(cs);
return 8;
case S390_VIRT_PREFIX_REGNUM:
env->psa = ldq_p(mem_buf);
env->psa = ldq_be_p(mem_buf);
cpu_synchronize_post_init(cs);
return 8;
default:
@ -298,19 +298,19 @@ static int cpu_write_virt_kvm_reg(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case S390_VIRT_KVM_PP_REGNUM:
env->pp = ldq_p(mem_buf);
env->pp = ldq_be_p(mem_buf);
cpu_synchronize_post_init(env_cpu(env));
return 8;
case S390_VIRT_KVM_PFT_REGNUM:
env->pfault_token = ldq_p(mem_buf);
env->pfault_token = ldq_be_p(mem_buf);
cpu_synchronize_post_init(env_cpu(env));
return 8;
case S390_VIRT_KVM_PFS_REGNUM:
env->pfault_select = ldq_p(mem_buf);
env->pfault_select = ldq_be_p(mem_buf);
cpu_synchronize_post_init(env_cpu(env));
return 8;
case S390_VIRT_KVM_PFC_REGNUM:
env->pfault_compare = ldq_p(mem_buf);
env->pfault_compare = ldq_be_p(mem_buf);
cpu_synchronize_post_init(env_cpu(env));
return 8;
default:
@ -338,7 +338,7 @@ static int cpu_write_gs_reg(CPUState *cs, uint8_t *mem_buf, int n)
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
env->gscb[n] = ldq_p(mem_buf);
env->gscb[n] = ldq_be_p(mem_buf);
cpu_synchronize_post_init(env_cpu(env));
return 8;
}

2
target/s390x/ioinst.c
View File

@ -603,7 +603,7 @@ static int chsc_sei_nt2_have_event(void)
#define CHSC_SEI_NT2 (1ULL << 61)
static void ioinst_handle_chsc_sei(ChscReq *req, ChscResp *res)
{
uint64_t selection_mask = ldq_p(&req->param1);
uint64_t selection_mask = ldq_be_p(&req->param1);
uint8_t *res_flags = (uint8_t *)res->data;
int have_event = 0;
int have_more = 0;