acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness

* Move reserved registers to the top of the section, so reader would be
  aware of effects when reading registers description.
* State registers endianness explicitly at the beginning of the section
* Describe registers behavior in case of 'CPU selector' register contains
  value that doesn't point to a possible CPU.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <1575896942-331151-5-git-send-email-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov 2019-12-09 14:08:57 +01:00 committed by Michael S. Tsirkin
parent 0cdd3eae15
commit 1d7a52835d

View File

@ -30,6 +30,18 @@ Register block base address:
Register block size:
ACPI_CPU_HOTPLUG_REG_LEN = 12
All accesses to registers described below, imply little-endian byte order.
Reserved resisters behavior:
- write accesses are ignored
- read accesses return all bits set to 0.
The last stored value in 'CPU selector' must refer to a possible CPU, otherwise
- reads from any register return 0
- writes to any other register are ignored until valid value is stored into it
On QEMU start, 'CPU selector' is initialized to a valid value, on reset it
keeps the current value.
read access:
offset:
[0x0-0x3] reserved
@ -86,9 +98,3 @@ write access:
ACPI_DEVICE_OST QMP event from QEMU to external applications
with current values of OST event and status registers.
other values: reserved
Selecting CPU device beyond possible range has no effect on platform:
- write accesses to CPU hot-plug registers not documented above are
ignored
- read accesses to CPU hot-plug registers not documented above return
all bits set to 0.