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Revert revisions r4168 and r4169. That's work in progress, not ready for trunk yet.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4171 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-04-07 21:24:25 +00:00
parent f9fcd6f505
commit 1cdb9c3d82
5 changed files with 26 additions and 22 deletions
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2
configure vendored
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@ -1224,7 +1224,7 @@ if test "$target_darwin_user" = "yes" ; then
echo "#define CONFIG_DARWIN_USER 1" >> $config_h echo "#define CONFIG_DARWIN_USER 1" >> $config_h
fi fi
if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64" -o "$target_cpu" = "sparc32plus" -o "$target_cpu" = "m68k" -o "$target_cpu" = "mips" -o "$target_cpu" = "mipsel" -o "$target_cpu" = "mipsn32" -o "$target_cpu" = "mipsn32el" -o "$target_cpu" = "mips64" -o "$target_cpu" = "mips64el" -o "$target_cpu" = "ppc" ; then if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64" -o "$target_cpu" = "sparc32plus" -o "$target_cpu" = "m68k" -o "$target_cpu" = "mips" -o "$target_cpu" = "mipsel" -o "$target_cpu" = "mipsn32" -o "$target_cpu" = "mipsn32el" -o "$target_cpu" = "mips64" -o "$target_cpu" = "mips64el"; then
echo "CONFIG_SOFTFLOAT=yes" >> $config_mak echo "CONFIG_SOFTFLOAT=yes" >> $config_mak
echo "#define CONFIG_SOFTFLOAT 1" >> $config_h echo "#define CONFIG_SOFTFLOAT 1" >> $config_h
fi fi

4
target-ppc/exec.h
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@ -27,6 +27,10 @@
#include "cpu.h" #include "cpu.h"
#include "exec-all.h" #include "exec-all.h"
/* For normal operations, precise emulation should not be needed */
//#define USE_PRECISE_EMULATION 1
#define USE_PRECISE_EMULATION 0
register struct CPUPPCState *env asm(AREG0); register struct CPUPPCState *env asm(AREG0);
#if TARGET_LONG_BITS > HOST_LONG_BITS #if TARGET_LONG_BITS > HOST_LONG_BITS
/* no registers can be used */ /* no registers can be used */

14
target-ppc/op.c
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@ -1716,7 +1716,7 @@ void OPPROTO op_srli_T1_64 (void)
/* fadd - fadd. */ /* fadd - fadd. */
void OPPROTO op_fadd (void) void OPPROTO op_fadd (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_fadd(); do_fadd();
#else #else
FT0 = float64_add(FT0, FT1, &env->fp_status); FT0 = float64_add(FT0, FT1, &env->fp_status);
@ -1727,7 +1727,7 @@ void OPPROTO op_fadd (void)
/* fsub - fsub. */ /* fsub - fsub. */
void OPPROTO op_fsub (void) void OPPROTO op_fsub (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_fsub(); do_fsub();
#else #else
FT0 = float64_sub(FT0, FT1, &env->fp_status); FT0 = float64_sub(FT0, FT1, &env->fp_status);
@ -1738,7 +1738,7 @@ void OPPROTO op_fsub (void)
/* fmul - fmul. */ /* fmul - fmul. */
void OPPROTO op_fmul (void) void OPPROTO op_fmul (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_fmul(); do_fmul();
#else #else
FT0 = float64_mul(FT0, FT1, &env->fp_status); FT0 = float64_mul(FT0, FT1, &env->fp_status);
@ -1749,7 +1749,7 @@ void OPPROTO op_fmul (void)
/* fdiv - fdiv. */ /* fdiv - fdiv. */
void OPPROTO op_fdiv (void) void OPPROTO op_fdiv (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_fdiv(); do_fdiv();
#else #else
FT0 = float64_div(FT0, FT1, &env->fp_status); FT0 = float64_div(FT0, FT1, &env->fp_status);
@ -1796,7 +1796,7 @@ void OPPROTO op_fsel (void)
/* fmadd - fmadd. */ /* fmadd - fmadd. */
void OPPROTO op_fmadd (void) void OPPROTO op_fmadd (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_fmadd(); do_fmadd();
#else #else
FT0 = float64_mul(FT0, FT1, &env->fp_status); FT0 = float64_mul(FT0, FT1, &env->fp_status);
@ -1808,7 +1808,7 @@ void OPPROTO op_fmadd (void)
/* fmsub - fmsub. */ /* fmsub - fmsub. */
void OPPROTO op_fmsub (void) void OPPROTO op_fmsub (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_fmsub(); do_fmsub();
#else #else
FT0 = float64_mul(FT0, FT1, &env->fp_status); FT0 = float64_mul(FT0, FT1, &env->fp_status);
@ -1835,7 +1835,7 @@ void OPPROTO op_fnmsub (void)
/* frsp - frsp. */ /* frsp - frsp. */
void OPPROTO op_frsp (void) void OPPROTO op_frsp (void)
{ {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
do_frsp(); do_frsp();
#else #else
FT0 = float64_to_float32(FT0, &env->fp_status); FT0 = float64_to_float32(FT0, &env->fp_status);

22
target-ppc/op_helper.c
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@ -922,7 +922,7 @@ void do_float_check_status (void)
} }
#endif #endif
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
void do_fadd (void) void do_fadd (void)
{ {
if (unlikely(float64_is_signaling_nan(FT0) || if (unlikely(float64_is_signaling_nan(FT0) ||
@ -989,7 +989,7 @@ void do_fdiv (void)
FT0 = float64_div(FT0, FT1, &env->fp_status); FT0 = float64_div(FT0, FT1, &env->fp_status);
} }
} }
#endif /* CONFIG_SOFTFLOAT */ #endif /* USE_PRECISE_EMULATION */
void do_fctiw (void) void do_fctiw (void)
{ {
@ -1003,7 +1003,7 @@ void do_fctiw (void)
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
} else { } else {
p.ll = float64_to_int32(FT0, &env->fp_status); p.ll = float64_to_int32(FT0, &env->fp_status);
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
/* XXX: higher bits are not supposed to be significant. /* XXX: higher bits are not supposed to be significant.
* to make tests easier, return the same as a real PowerPC 750 * to make tests easier, return the same as a real PowerPC 750
*/ */
@ -1025,7 +1025,7 @@ void do_fctiwz (void)
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
} else { } else {
p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status); p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status);
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
/* XXX: higher bits are not supposed to be significant. /* XXX: higher bits are not supposed to be significant.
* to make tests easier, return the same as a real PowerPC 750 * to make tests easier, return the same as a real PowerPC 750
*/ */
@ -1114,7 +1114,7 @@ void do_frim (void)
do_fri(float_round_down); do_fri(float_round_down);
} }
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
void do_fmadd (void) void do_fmadd (void)
{ {
if (unlikely(float64_is_signaling_nan(FT0) || if (unlikely(float64_is_signaling_nan(FT0) ||
@ -1164,7 +1164,7 @@ void do_fmsub (void)
#endif #endif
} }
} }
#endif /* CONFIG_SOFTFLOAT */ #endif /* USE_PRECISE_EMULATION */
void do_fnmadd (void) void do_fnmadd (void)
{ {
@ -1174,7 +1174,7 @@ void do_fnmadd (void)
/* sNaN operation */ /* sNaN operation */
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
} else { } else {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
#ifdef FLOAT128 #ifdef FLOAT128
/* This is the way the PowerPC specification defines it */ /* This is the way the PowerPC specification defines it */
float128 ft0_128, ft1_128; float128 ft0_128, ft1_128;
@ -1206,7 +1206,7 @@ void do_fnmsub (void)
/* sNaN operation */ /* sNaN operation */
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
} else { } else {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
#ifdef FLOAT128 #ifdef FLOAT128
/* This is the way the PowerPC specification defines it */ /* This is the way the PowerPC specification defines it */
float128 ft0_128, ft1_128; float128 ft0_128, ft1_128;
@ -1230,7 +1230,7 @@ void do_fnmsub (void)
} }
} }
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
void do_frsp (void) void do_frsp (void)
{ {
if (unlikely(float64_is_signaling_nan(FT0))) { if (unlikely(float64_is_signaling_nan(FT0))) {
@ -1240,7 +1240,7 @@ void do_frsp (void)
FT0 = float64_to_float32(FT0, &env->fp_status); FT0 = float64_to_float32(FT0, &env->fp_status);
} }
} }
#endif /* CONFIG_SOFTFLOAT */ #endif /* USE_PRECISE_EMULATION */
void do_fsqrt (void) void do_fsqrt (void)
{ {
@ -1295,7 +1295,7 @@ void do_fres (void)
/* Zero reciprocal */ /* Zero reciprocal */
float_zero_divide_excp(); float_zero_divide_excp();
} else if (likely(isnormal(FT0))) { } else if (likely(isnormal(FT0))) {
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
FT0 = float64_div(1.0, FT0, &env->fp_status); FT0 = float64_div(1.0, FT0, &env->fp_status);
FT0 = float64_to_float32(FT0, &env->fp_status); FT0 = float64_to_float32(FT0, &env->fp_status);
#else #else

6
target-ppc/op_helper.h
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@ -98,7 +98,7 @@ void do_compute_fprf (int set_class);
#ifdef CONFIG_SOFTFLOAT #ifdef CONFIG_SOFTFLOAT
void do_float_check_status (void); void do_float_check_status (void);
#endif #endif
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
void do_fadd (void); void do_fadd (void);
void do_fsub (void); void do_fsub (void);
void do_fmul (void); void do_fmul (void);
@ -109,13 +109,13 @@ void do_fre (void);
void do_fres (void); void do_fres (void);
void do_frsqrte (void); void do_frsqrte (void);
void do_fsel (void); void do_fsel (void);
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
void do_fmadd (void); void do_fmadd (void);
void do_fmsub (void); void do_fmsub (void);
#endif #endif
void do_fnmadd (void); void do_fnmadd (void);
void do_fnmsub (void); void do_fnmsub (void);
#ifdef CONFIG_SOFTFLOAT #if USE_PRECISE_EMULATION
void do_frsp (void); void do_frsp (void);
#endif #endif
void do_fctiw (void); void do_fctiw (void);