tcg/loongarch64: Support TCG_TYPE_V64
We can implement this with fld_d, fst_d for load and store, and then use the normal v128 operations in registers. This will improve support for guests which use v64. Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -321,6 +321,7 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
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}
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}
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break;
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case TCG_TYPE_V64:
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case TCG_TYPE_V128:
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tcg_out_opc_vori_b(s, ret, arg, 0);
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break;
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@ -838,6 +839,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg dest,
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}
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break;
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case TCG_TYPE_I64:
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case TCG_TYPE_V64:
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if (dest < TCG_REG_V0) {
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tcg_out_ldst(s, OPC_LD_D, dest, base, offset);
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} else {
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@ -869,6 +871,7 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg src,
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}
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break;
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case TCG_TYPE_I64:
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case TCG_TYPE_V64:
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if (src < TCG_REG_V0) {
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tcg_out_ldst(s, OPC_ST_D, src, base, offset);
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} else {
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@ -1880,8 +1883,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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a2 = args[2];
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a3 = args[3];
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/* Currently only supports V128 */
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tcg_debug_assert(type == TCG_TYPE_V128);
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/* Currently only supports V64 & V128 */
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tcg_debug_assert(type == TCG_TYPE_V64 || type == TCG_TYPE_V128);
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switch (opc) {
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case INDEX_op_st_vec:
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@ -2394,6 +2397,7 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9);
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if (cpuinfo & CPUINFO_LSX) {
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tcg_target_available_regs[TCG_TYPE_V64] = ALL_VECTOR_REGS;
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tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS;
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tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V24);
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tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V25);
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@ -171,7 +171,7 @@ typedef enum {
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#define TCG_TARGET_HAS_tst 0
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#define TCG_TARGET_HAS_v64 0
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#define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_LSX)
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#define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX)
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#define TCG_TARGET_HAS_v256 0
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