Reorganize PowerPC instructions categories, add icbi separate case.
Fix frsqrtes instruction opcode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3636 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -426,111 +426,123 @@ static always_inline target_ulong MASK (uint32_t start, uint32_t end)
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/*****************************************************************************/
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/* PowerPC Instructions types definitions */
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enum {
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PPC_NONE = 0x0000000000000000ULL,
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PPC_NONE = 0x0000000000000000ULL,
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/* PowerPC base instructions set */
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PPC_INSNS_BASE = 0x0000000000000001ULL,
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/* integer operations instructions */
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PPC_INSNS_BASE = 0x0000000000000001ULL,
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/* integer operations instructions */
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#define PPC_INTEGER PPC_INSNS_BASE
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/* flow control instructions */
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/* flow control instructions */
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#define PPC_FLOW PPC_INSNS_BASE
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/* virtual memory instructions */
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/* virtual memory instructions */
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#define PPC_MEM PPC_INSNS_BASE
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/* ld/st with reservation instructions */
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/* ld/st with reservation instructions */
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#define PPC_RES PPC_INSNS_BASE
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/* cache control instructions */
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#define PPC_CACHE PPC_INSNS_BASE
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/* spr/msr access instructions */
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/* spr/msr access instructions */
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#define PPC_MISC PPC_INSNS_BASE
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/* Optional floating point instructions */
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PPC_FLOAT = 0x0000000000000002ULL,
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PPC_FLOAT_FSQRT = 0x0000000000000004ULL,
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PPC_FLOAT_FRES = 0x0000000000000008ULL,
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PPC_FLOAT_FRSQRTE = 0x0000000000000010ULL,
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PPC_FLOAT_FSEL = 0x0000000000000020ULL,
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PPC_FLOAT_STFIWX = 0x0000000000000040ULL,
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/* external control instructions */
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PPC_EXTERN = 0x0000000000000080ULL,
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/* segment register access instructions */
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PPC_SEGMENT = 0x0000000000000100ULL,
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/* Optional cache control instruction */
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PPC_CACHE_DCBA = 0x0000000000000200ULL,
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/* Optional memory control instructions */
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PPC_MEM_TLBIA = 0x0000000000000400ULL,
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PPC_MEM_TLBIE = 0x0000000000000800ULL,
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PPC_MEM_TLBSYNC = 0x0000000000001000ULL,
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/* eieio & sync */
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PPC_MEM_SYNC = 0x0000000000002000ULL,
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/* PowerPC 6xx TLB management instructions */
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PPC_6xx_TLB = 0x0000000000004000ULL,
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/* Altivec support */
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PPC_ALTIVEC = 0x0000000000008000ULL,
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/* Time base mftb instruction */
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PPC_MFTB = 0x0000000000010000ULL,
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/* Embedded PowerPC dedicated instructions */
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PPC_EMB_COMMON = 0x0000000000020000ULL,
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/* PowerPC 40x exception model */
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PPC_40x_EXCP = 0x0000000000040000ULL,
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/* PowerPC 40x TLB management instructions */
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PPC_40x_TLB = 0x0000000000080000ULL,
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/* PowerPC 405 Mac instructions */
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PPC_405_MAC = 0x0000000000100000ULL,
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/* PowerPC 440 specific instructions */
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PPC_440_SPEC = 0x0000000000200000ULL,
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/* Power-to-PowerPC bridge (601) */
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PPC_POWER_BR = 0x0000000000400000ULL,
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/* PowerPC 602 specific */
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PPC_602_SPEC = 0x0000000000800000ULL,
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/* Deprecated instructions */
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/* Original POWER instruction set */
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PPC_POWER = 0x0000000001000000ULL,
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/* POWER2 instruction set extension */
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PPC_POWER2 = 0x0000000002000000ULL,
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/* Power RTC support */
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PPC_POWER_RTC = 0x0000000004000000ULL,
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/* Deprecated instruction sets */
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/* Original POWER instruction set */
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PPC_POWER = 0x0000000000000001ULL,
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/* POWER2 instruction set extension */
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PPC_POWER2 = 0x0000000000000002ULL,
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/* Power RTC support */
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PPC_POWER_RTC = 0x0000000000000004ULL,
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/* Power-to-PowerPC bridge (601) */
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PPC_POWER_BR = 0x0000000000000008ULL,
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/* 64 bits PowerPC instruction set */
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PPC_64B = 0x0000000008000000ULL,
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/* 64 bits hypervisor extensions */
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PPC_64H = 0x0000000010000000ULL,
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/* segment register access instructions for PowerPC 64 "bridge" */
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PPC_SEGMENT_64B = 0x0000000020000000ULL,
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/* BookE (embedded) PowerPC specification */
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PPC_BOOKE = 0x0000000040000000ULL,
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/* eieio */
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PPC_MEM_EIEIO = 0x0000000080000000ULL,
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/* e500 vector instructions */
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PPC_E500_VECTOR = 0x0000000100000000ULL,
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/* PowerPC 4xx dedicated instructions */
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PPC_4xx_COMMON = 0x0000000200000000ULL,
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/* PowerPC 2.03 specification extensions */
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PPC_203 = 0x0000000400000000ULL,
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/* PowerPC 2.03 SPE extension */
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PPC_SPE = 0x0000000800000000ULL,
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/* PowerPC 2.03 SPE floating-point extension */
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PPC_SPEFPU = 0x0000001000000000ULL,
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/* SLB management */
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PPC_SLBI = 0x0000002000000000ULL,
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/* PowerPC 40x ibct instructions */
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PPC_40x_ICBT = 0x0000004000000000ULL,
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/* PowerPC 74xx TLB management instructions */
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PPC_74xx_TLB = 0x0000008000000000ULL,
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/* More BookE (embedded) instructions... */
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PPC_BOOKE_EXT = 0x0000010000000000ULL,
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/* rfmci is not implemented in all BookE PowerPC */
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PPC_RFMCI = 0x0000020000000000ULL,
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/* user-mode DCR access, implemented in PowerPC 460 */
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PPC_DCRUX = 0x0000040000000000ULL,
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PPC_64B = 0x0000000000000010ULL,
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/* New 64 bits extensions (PowerPC 2.0x) */
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PPC_64BX = 0x0000000000000020ULL,
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/* 64 bits hypervisor extensions */
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PPC_64H = 0x0000000000000040ULL,
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/* New wait instruction (PowerPC 2.0x) */
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PPC_WAIT = 0x0000000000000080ULL,
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/* Time base mftb instruction */
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PPC_MFTB = 0x0000000000000100ULL,
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/* Fixed-point unit extensions */
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/* PowerPC 602 specific */
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PPC_602_SPEC = 0x0000000000000200ULL,
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/* PowerPC 2.03 specification extensions */
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PPC_203 = 0x0000000000000400ULL,
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/* Floating-point unit extensions */
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/* Optional floating point instructions */
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PPC_FLOAT = 0x0000000000010000ULL,
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/* New floating-point extensions (PowerPC 2.0x) */
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PPC_FLOAT_EXT = 0x0000080000000000ULL,
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/* New wait instruction (PowerPC 2.0x) */
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PPC_WAIT = 0x0000100000000000ULL,
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/* New 64 bits extensions (PowerPC 2.0x) */
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PPC_64BX = 0x0000200000000000ULL,
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/* dcbz instruction with fixed cache line size */
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PPC_CACHE_DCBZ = 0x0000400000000000ULL,
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/* dcbz instruction with tunable cache line size */
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PPC_CACHE_DCBZT = 0x0000800000000000ULL,
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/* frsqrtes extension */
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PPC_FLOAT_FRSQRTES = 0x0001000000000000ULL,
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PPC_FLOAT_EXT = 0x0000000000020000ULL,
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PPC_FLOAT_FSQRT = 0x0000000000040000ULL,
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PPC_FLOAT_FRES = 0x0000000000080000ULL,
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PPC_FLOAT_FRSQRTE = 0x0000000000100000ULL,
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PPC_FLOAT_FRSQRTES = 0x0000000000200000ULL,
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PPC_FLOAT_FSEL = 0x0000000000400000ULL,
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PPC_FLOAT_STFIWX = 0x0000000000800000ULL,
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/* Vector/SIMD extensions */
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/* Altivec support */
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PPC_ALTIVEC = 0x0000000001000000ULL,
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/* e500 vector instructions */
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PPC_E500_VECTOR = 0x0000000002000000ULL,
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/* PowerPC 2.03 SPE extension */
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PPC_SPE = 0x0000000004000000ULL,
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/* PowerPC 2.03 SPE floating-point extension */
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PPC_SPEFPU = 0x0000000008000000ULL,
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/* Optional memory control instructions */
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PPC_MEM_TLBIA = 0x0000000010000000ULL,
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PPC_MEM_TLBIE = 0x0000000020000000ULL,
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PPC_MEM_TLBSYNC = 0x0000000040000000ULL,
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/* sync instruction */
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PPC_MEM_SYNC = 0x0000000080000000ULL,
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/* eieio instruction */
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PPC_MEM_EIEIO = 0x0000000100000000ULL,
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/* Cache control instructions */
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PPC_CACHE = 0x0000001000000000ULL,
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/* icbi instruction */
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PPC_CACHE_ICBI = 0x0000002000000000ULL,
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/* dcbz instruction with fixed cache line size */
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PPC_CACHE_DCBZ = 0x0000004000000000ULL,
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/* dcbz instruction with tunable cache line size */
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PPC_CACHE_DCBZT = 0x0000008000000000ULL,
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/* dcba instruction */
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PPC_CACHE_DCBA = 0x0000010000000000ULL,
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/* MMU related extensions */
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/* external control instructions */
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PPC_EXTERN = 0x0000100000000000ULL,
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/* segment register access instructions */
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PPC_SEGMENT = 0x0000200000000000ULL,
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/* PowerPC 6xx TLB management instructions */
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PPC_6xx_TLB = 0x0000400000000000ULL,
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/* PowerPC 74xx TLB management instructions */
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PPC_74xx_TLB = 0x0000800000000000ULL,
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/* PowerPC 40x TLB management instructions */
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PPC_40x_TLB = 0x0001000000000000ULL,
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/* segment register access instructions for PowerPC 64 "bridge" */
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PPC_SEGMENT_64B = 0x0002000000000000ULL,
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/* SLB management */
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PPC_SLBI = 0x0004000000000000ULL,
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/* Embedded PowerPC dedicated instructions */
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PPC_EMB_COMMON = 0x0010000000000000ULL,
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/* PowerPC 40x exception model */
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PPC_40x_EXCP = 0x0020000000000000ULL,
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/* PowerPC 405 Mac instructions */
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PPC_405_MAC = 0x0040000000000000ULL,
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/* PowerPC 440 specific instructions */
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PPC_440_SPEC = 0x0080000000000000ULL,
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/* BookE (embedded) PowerPC specification */
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PPC_BOOKE = 0x0100000000000000ULL,
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/* More BookE (embedded) instructions... */
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PPC_BOOKE_EXT = 0x0200000000000000ULL,
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/* PowerPC 4xx dedicated instructions */
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PPC_4xx_COMMON = 0x0400000000000000ULL,
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/* PowerPC 40x ibct instructions */
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PPC_40x_ICBT = 0x0800000000000000ULL,
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/* rfmci is not implemented in all BookE PowerPC */
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PPC_RFMCI = 0x1000000000000000ULL,
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/* user-mode DCR access, implemented in PowerPC 460 */
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PPC_DCRUX = 0x2000000000000000ULL,
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};
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/*****************************************************************************/
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@ -1805,7 +1817,7 @@ static always_inline void gen_op_frsqrtes (void)
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gen_op_frsqrte();
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gen_op_frsp();
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}
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GEN_FLOAT_BS(rsqrtes, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTES);
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GEN_FLOAT_BS(rsqrtes, 0x3B, 0x1A, 1, PPC_FLOAT_FRSQRTES);
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/* fsel */
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_GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, 0, PPC_FLOAT_FSEL);
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@ -3980,7 +3992,7 @@ static GenOpFunc *gen_op_icbi[] = {
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#endif
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#endif
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GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE)
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GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE_ICBI)
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{
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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@ -2651,7 +2651,8 @@ static int check_pow_hid0 (CPUPPCState *env)
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/* PowerPC implementations definitions */
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/* PowerPC 40x instruction set */
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#define POWERPC_INSNS_EMB (PPC_INSNS_BASE | PPC_CACHE_DCBZ | PPC_EMB_COMMON)
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#define POWERPC_INSNS_EMB (PPC_INSNS_BASE | PPC_EMB_COMMON | \
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PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ)
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/* PowerPC 401 */
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#define POWERPC_INSNS_401 (POWERPC_INSNS_EMB | \
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@ -3176,7 +3177,7 @@ static void init_proc_460F (CPUPPCState *env)
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PPC_CACHE_DCBA | \
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PPC_FLOAT | PPC_FLOAT_FSQRT | \
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PPC_FLOAT_FRES | PPC_FLOAT_FRSQRTE | \
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PPC_FLOAT_FSEL | PPC_FLOAT_STFIW | \
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PPC_FLOAT_FSEL | PPC_FLOAT_STFIWX | \
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PPC_BOOKE)
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#define POWERPC_MSRM_BookE (0x000000000006D630ULL)
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#define POWERPC_MMU_BookE (POWERPC_MMU_BOOKE)
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@ -3233,8 +3234,9 @@ static void init_proc_e500 (CPUPPCState *env)
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/* Non-embedded PowerPC */
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/* Base instructions set for all 6xx/7xx/74xx/970 PowerPC */
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#define POWERPC_INSNS_6xx (PPC_INSNS_BASE | PPC_FLOAT | PPC_MEM_SYNC | \
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PPC_MEM_EIEIO | PPC_MEM_TLBIE)
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#define POWERPC_INSNS_6xx (PPC_INSNS_BASE | PPC_FLOAT | \
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PPC_CACHE | PPC_CACHE_ICBI | \
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PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE)
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/* Instructions common to all 6xx/7xx/74xx/970 PowerPC except 601 & 602 */
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#define POWERPC_INSNS_WORKS (POWERPC_INSNS_6xx | PPC_FLOAT_FSQRT | \
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PPC_FLOAT_FRES | PPC_FLOAT_FRSQRTE | \
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