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target/ppc: cpu_init: Decouple G2 SPR registration from 755

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We're considering these two to be in different CPU families (6xx and
7xx), so keep their SPR registration separate.

The code was copied into register_G2_sprs and the common function was
renamed to apply only to the 755.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20220216162426.1885923-9-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Fabiano Rosas 2022-02-18 08:34:14 +01:00 committed by Cédric Le Goater
parent e599bcedf9
commit 1a71c5d158
1 changed files with 20 additions and 5 deletions
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25
target/ppc/cpu_init.c
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@ -466,8 +466,7 @@ static void register_6xx_7xx_soft_tlb(CPUPPCState *env, int nb_tlbs, int nb_ways
#endif
}
/* SPR common to MPC755 and G2 */
static void register_G2_755_sprs(CPUPPCState *env)
static void register_755_sprs(CPUPPCState *env)
{
/* SGPRs */
spr_register(env, SPR_SPRG4, "SPRG4",
@ -783,6 +782,23 @@ static void register_G2_sprs(CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
/* SGPRs */
spr_register(env, SPR_SPRG4, "SPRG4",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_SPRG5, "SPRG5",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_SPRG6, "SPRG6",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_SPRG7, "SPRG7",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
}
static void register_74xx_sprs(CPUPPCState *env)
@ -2848,7 +2864,6 @@ static void init_proc_G2(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_G2_755_sprs(env);
register_G2_sprs(env);
/* Memory management */
@ -4470,7 +4485,7 @@ static void init_proc_745(CPUPPCState *env)
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
register_G2_755_sprs(env);
register_755_sprs(env);
/* Thermal management */
register_thrm_sprs(env);
/* Hardware implementation registers */
@ -4543,7 +4558,7 @@ static void init_proc_755(CPUPPCState *env)
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
register_G2_755_sprs(env);
register_755_sprs(env);
/* L2 cache control */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,