igb: Implement MSI-X single vector mode
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
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@ -1873,7 +1873,7 @@ igb_update_interrupt_state(IGBCore *core)
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icr = core->mac[ICR] & core->mac[IMS];
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if (msix_enabled(core->owner)) {
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if (core->mac[GPIE] & E1000_GPIE_MSIX_MODE) {
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if (icr) {
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causes = 0;
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if (icr & E1000_ICR_DRSTA) {
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@ -1908,7 +1908,12 @@ igb_update_interrupt_state(IGBCore *core)
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trace_e1000e_irq_pending_interrupts(core->mac[ICR] & core->mac[IMS],
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core->mac[ICR], core->mac[IMS]);
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if (msi_enabled(core->owner)) {
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if (msix_enabled(core->owner)) {
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if (icr) {
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trace_e1000e_irq_msix_notify_vec(0);
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msix_notify(core->owner, 0);
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}
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} else if (msi_enabled(core->owner)) {
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if (icr) {
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msi_notify(core->owner, 0);
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}
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