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* Fix Patchew CI failures (myself)

Browse Source 
* i386 fw_cfg refactoring (Philippe)
 * pmem bugfix (Stefan)
 * Support for accessing cstate MSRs (Wanpeng)
 * exec.c cleanups (Wei Yang)
 * Improved throttling (Yury)
 * elf-ops.h coverity fix (Stefano)
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 Version: GnuPG v2.0.22 (GNU/Linux)
 
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Fix Patchew CI failures (myself)
* i386 fw_cfg refactoring (Philippe)
* pmem bugfix (Stefan)
* Support for accessing cstate MSRs (Wanpeng)
* exec.c cleanups (Wei Yang)
* Improved throttling (Yury)
* elf-ops.h coverity fix (Stefano)

# gpg: Signature made Mon 16 Sep 2019 16:13:12 BST
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (29 commits)
  hw/i386/pc: Extract the x86 generic fw_cfg code
  hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*
  hw/i386/pc: Let pc_build_feature_control() take a MachineState argument
  hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
  hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
  hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
  hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
  hw/i386/pc: Replace PCMachineState argument with MachineState in fw_cfg_arch_create
  hw/i386/pc: Pass the CPUArchIdList array by argument
  hw/i386/pc: Pass the apic_id_limit value by argument
  hw/i386/pc: Pass the boot_cpus value by argument
  hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create
  hw/i386/pc: Use address_space_memory in place
  hw/i386/pc: Extract e820 memory layout code
  hw/i386/pc: Use e820_get_num_entries() to access e820_entries
  cpus: Fix throttling during vm_stop
  qemu-thread: Add qemu_cond_timedwait
  memory: inline and optimize devend_memop
  memory: fetch pmem size in get_file_size()
  elf-ops.h: fix int overflow in load_elf()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2019-09-17 10:20:17 +01:00
commit 186c0ab9b9
28 changed files with 456 additions and 380 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
backends/hostmem-file.c
View File

@ -58,28 +58,6 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
return;
}
/*
* Verify pmem file size since starting a guest with an incorrect size
* leads to confusing failures inside the guest.
*/
if (fb->is_pmem) {
Error *local_err = NULL;
uint64_t size;
size = qemu_get_pmem_size(fb->mem_path, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
if (size && backend->size > size) {
error_setg(errp, "size property %" PRIu64 " is larger than "
"pmem file \"%s\" size %" PRIu64, backend->size,
fb->mem_path, size);
return;
}
}
backend->force_prealloc = mem_prealloc;
name = host_memory_backend_get_name(backend);
memory_region_init_ram_from_file(&backend->mr, OBJECT(backend),

25
cpus.c
View File

@ -77,6 +77,8 @@
#endif /* CONFIG_LINUX */
static QemuMutex qemu_global_mutex;
int64_t max_delay;
int64_t max_advance;
@ -782,7 +784,7 @@ static void cpu_throttle_thread(CPUState *cpu, run_on_cpu_data opaque)
{
double pct;
double throttle_ratio;
long sleeptime_ns;
int64_t sleeptime_ns, endtime_ns;
if (!cpu_throttle_get_percentage()) {
return;
@ -790,11 +792,20 @@ static void cpu_throttle_thread(CPUState *cpu, run_on_cpu_data opaque)
pct = (double)cpu_throttle_get_percentage()/100;
throttle_ratio = pct / (1 - pct);
sleeptime_ns = (long)(throttle_ratio * CPU_THROTTLE_TIMESLICE_NS);
qemu_mutex_unlock_iothread();
g_usleep(sleeptime_ns / 1000); /* Convert ns to us for usleep call */
qemu_mutex_lock_iothread();
/* Add 1ns to fix double's rounding error (like 0.9999999...) */
sleeptime_ns = (int64_t)(throttle_ratio * CPU_THROTTLE_TIMESLICE_NS + 1);
endtime_ns = qemu_clock_get_ns(QEMU_CLOCK_REALTIME) + sleeptime_ns;
while (sleeptime_ns > 0 && !cpu->stop) {
if (sleeptime_ns > SCALE_MS) {
qemu_cond_timedwait(cpu->halt_cond, &qemu_global_mutex,
sleeptime_ns / SCALE_MS);
} else {
qemu_mutex_unlock_iothread();
g_usleep(sleeptime_ns / SCALE_US);
qemu_mutex_lock_iothread();
}
sleeptime_ns = endtime_ns - qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
}
atomic_set(&cpu->throttle_thread_scheduled, 0);
}
@ -1172,8 +1183,6 @@ static void qemu_init_sigbus(void)
}
#endif /* !CONFIG_LINUX */
static QemuMutex qemu_global_mutex;
static QemuThread io_thread;
/* cpu creation */

1
default-configs/i386-softmmu.mak
View File

@ -25,4 +25,3 @@
CONFIG_ISAPC=y
CONFIG_I440FX=y
CONFIG_Q35=y
CONFIG_ACPI_PCI=y

54
exec.c
View File

@ -227,8 +227,7 @@ static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
{
static unsigned alloc_hint = 16;
if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
map->nodes_nb_alloc = MAX(alloc_hint, map->nodes_nb + nodes);
map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
alloc_hint = map->nodes_nb_alloc;
}
@ -255,7 +254,7 @@ static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
}
static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
hwaddr *index, hwaddr *nb, uint16_t leaf,
hwaddr *index, uint64_t *nb, uint16_t leaf,
int level)
{
PhysPageEntry *p;
@ -281,7 +280,7 @@ static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
}
static void phys_page_set(AddressSpaceDispatch *d,
hwaddr index, hwaddr nb,
hwaddr index, uint64_t nb,
uint16_t leaf)
{
/* Wildly overreserve - it doesn't matter much. */
@ -325,7 +324,8 @@ static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
assert(valid_ptr < P_L2_SIZE);
/* Don't compress if it won't fit in the # of bits we have. */
if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
if (P_L2_LEVELS >= (1 << 6) &&
lp->skip + p[valid_ptr].skip >= (1 << 6)) {
return;
}
@ -1492,8 +1492,8 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,
#if !defined(CONFIG_USER_ONLY)
static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section);
static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section);
static subpage_t *subpage_init(FlatView *fv, hwaddr base);
static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) =
@ -1791,7 +1791,39 @@ long qemu_maxrampagesize(void)
#ifdef CONFIG_POSIX
static int64_t get_file_size(int fd)
{
int64_t size = lseek(fd, 0, SEEK_END);
int64_t size;
#if defined(__linux__)
struct stat st;
if (fstat(fd, &st) < 0) {
return -errno;
}
/* Special handling for devdax character devices */
if (S_ISCHR(st.st_mode)) {
g_autofree char *subsystem_path = NULL;
g_autofree char *subsystem = NULL;
subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
major(st.st_rdev), minor(st.st_rdev));
subsystem = g_file_read_link(subsystem_path, NULL);
if (subsystem && g_str_has_suffix(subsystem, "/dax")) {
g_autofree char *size_path = NULL;
g_autofree char *size_str = NULL;
size_path = g_strdup_printf("/sys/dev/char/%d:%d/size",
major(st.st_rdev), minor(st.st_rdev));
if (g_file_get_contents(size_path, &size_str, NULL, NULL)) {
return g_ascii_strtoll(size_str, NULL, 0);
}
}
}
#endif /* defined(__linux__) */
/* st.st_size may be zero for special files yet lseek(2) works */
size = lseek(fd, 0, SEEK_END);
if (size < 0) {
return -errno;
}
@ -2914,8 +2946,8 @@ static const MemoryRegionOps subpage_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section)
static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section)
{
int idx, eidx;
@ -2938,6 +2970,7 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
{
subpage_t *mmio;
/* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
mmio->fv = fv;
mmio->base = base;
@ -2948,7 +2981,6 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr base)
printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
mmio, base, TARGET_PAGE_SIZE);
#endif
subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
return mmio;
}

2
hw/core/loader.c
View File

@ -338,6 +338,8 @@ const char *load_elf_strerror(int error)
return "The image is from incompatible architecture";
case ELF_LOAD_WRONG_ENDIAN:
return "The image has incorrect endianness";
case ELF_LOAD_TOO_BIG:
return "The image segments are too big to load";
default:
return "Unknown error";
}

1
hw/i386/Kconfig
View File

@ -29,6 +29,7 @@ config PC
select MC146818RTC
# For ACPI builder:
select SERIAL_ISA
select ACPI_PCI
select ACPI_VMGENID
select VIRTIO_PMEM_SUPPORTED

2
hw/i386/Makefile.objs
View File

@ -1,5 +1,5 @@
obj-$(CONFIG_KVM) += kvm/
obj-y += multiboot.o
obj-y += e820_memory_layout.o multiboot.o
obj-y += pc.o
obj-$(CONFIG_I440FX) += pc_piix.o
obj-$(CONFIG_Q35) += pc_q35.o

59
hw/i386/e820_memory_layout.c Normal file
View File

@ -0,0 +1,59 @@
/*
* QEMU BIOS e820 routines
*
* Copyright (c) 2003-2004 Fabrice Bellard
*
* SPDX-License-Identifier: MIT
*/
#include "qemu/osdep.h"
#include "qemu/bswap.h"
#include "e820_memory_layout.h"
static size_t e820_entries;
struct e820_table e820_reserve;
struct e820_entry *e820_table;
int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
{
int index = le32_to_cpu(e820_reserve.count);
struct e820_entry *entry;
if (type != E820_RAM) {
/* old FW_CFG_E820_TABLE entry -- reservations only */
if (index >= E820_NR_ENTRIES) {
return -EBUSY;
}
entry = &e820_reserve.entry[index++];
entry->address = cpu_to_le64(address);
entry->length = cpu_to_le64(length);
entry->type = cpu_to_le32(type);
e820_reserve.count = cpu_to_le32(index);
}
/* new "etc/e820" file -- include ram too */
e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
e820_table[e820_entries].address = cpu_to_le64(address);
e820_table[e820_entries].length = cpu_to_le64(length);
e820_table[e820_entries].type = cpu_to_le32(type);
e820_entries++;
return e820_entries;
}
int e820_get_num_entries(void)
{
return e820_entries;
}
bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
{
if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
*address = le64_to_cpu(e820_table[idx].address);
*length = le64_to_cpu(e820_table[idx].length);
return true;
}
return false;
}

42
hw/i386/e820_memory_layout.h Normal file
View File

@ -0,0 +1,42 @@
/*
* QEMU BIOS e820 routines
*
* Copyright (c) 2003-2004 Fabrice Bellard
*
* SPDX-License-Identifier: MIT
*/
#ifndef HW_I386_E820_H
#define HW_I386_E820_H
/* e820 types */
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
#define E820_UNUSABLE 5
#define E820_NR_ENTRIES 16
struct e820_entry {
uint64_t address;
uint64_t length;
uint32_t type;
} QEMU_PACKED __attribute((__aligned__(4)));
struct e820_table {
uint32_t count;
struct e820_entry entry[E820_NR_ENTRIES];
} QEMU_PACKED __attribute((__aligned__(4)));
extern struct e820_table e820_reserve;
extern struct e820_entry *e820_table;
int e820_add_entry(uint64_t address, uint64_t length, uint32_t type);
int e820_get_num_entries(void);
bool e820_get_entry(int index, uint32_t type,
uint64_t *address, uint64_t *length);
#endif

137
hw/i386/fw_cfg.c
View File

@ -13,8 +13,15 @@
*/
#include "qemu/osdep.h"
#include "sysemu/numa.h"
#include "hw/acpi/acpi.h"
#include "hw/firmware/smbios.h"
#include "hw/i386/pc.h"
#include "hw/i386/fw_cfg.h"
#include "hw/timer/hpet.h"
#include "hw/nvram/fw_cfg.h"
#include "e820_memory_layout.h"
#include "kvm_i386.h"
const char *fw_cfg_arch_key_name(uint16_t key)
{
@ -36,3 +43,133 @@ const char *fw_cfg_arch_key_name(uint16_t key)
}
return NULL;
}
void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
struct smbios_phys_mem_area *mem_array;
unsigned i, array_count;
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
smbios_tables = smbios_get_table_legacy(ms, &smbios_tables_len);
if (smbios_tables) {
fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
smbios_tables, smbios_tables_len);
}
/* build the array of physical mem area from e820 table */
mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
uint64_t addr, len;
if (e820_get_entry(i, E820_RAM, &addr, &len)) {
mem_array[array_count].address = addr;
mem_array[array_count].length = len;
array_count++;
}
}
smbios_get_tables(ms, mem_array, array_count,
&smbios_tables, &smbios_tables_len,
&smbios_anchor, &smbios_anchor_len);
g_free(mem_array);
if (smbios_anchor) {
fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
smbios_tables, smbios_tables_len);
fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
smbios_anchor, smbios_anchor_len);
}
}
FWCfgState *fw_cfg_arch_create(MachineState *ms,
uint16_t boot_cpus,
uint16_t apic_id_limit)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
int i;
MachineClass *mc = MACHINE_GET_CLASS(ms);
const CPUArchIdList *cpus = mc->possible_cpu_arch_ids(ms);
int nb_numa_nodes = ms->numa_state->num_nodes;
fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
&address_space_memory);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
/* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
*
* For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
* building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
* that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
* for CPU hotplug also uses APIC ID and not "CPU index".
* This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
* but the "limit to the APIC ID values SeaBIOS may see".
*
* So for compatibility reasons with old BIOSes we are stuck with
* "etc/max-cpus" actually being apic_id_limit
*/
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
acpi_tables, acpi_tables_len);
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
sizeof(struct e820_entry) * e820_get_num_entries());
fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
/* allocate memory for the NUMA channel: one (64bit) word for the number
* of nodes, one word for each VCPU->node and one word for each node to
* hold the amount of memory.
*/
numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
for (i = 0; i < cpus->len; i++) {
unsigned int apic_id = cpus->cpus[i].arch_id;
assert(apic_id < apic_id_limit);
numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
}
for (i = 0; i < nb_numa_nodes; i++) {
numa_fw_cfg[apic_id_limit + 1 + i] =
cpu_to_le64(ms->numa_state->nodes[i].node_mem);
}
fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
(1 + apic_id_limit + nb_numa_nodes) *
sizeof(*numa_fw_cfg));
return fw_cfg;
}
void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg)
{
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
CPUX86State *env = &cpu->env;
uint32_t unused, ecx, edx;
uint64_t feature_control_bits = 0;
uint64_t *val;
cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
if (ecx & CPUID_EXT_VMX) {
feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
}
if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
(CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
(env->mcg_cap & MCG_LMCE_P)) {
feature_control_bits |= FEATURE_CONTROL_LMCE;
}
if (!feature_control_bits) {
return;
}
val = g_malloc(sizeof(*val));
*val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
}

7
hw/i386/fw_cfg.h
View File

@ -9,6 +9,7 @@
#ifndef HW_I386_FW_CFG_H
#define HW_I386_FW_CFG_H
#include "hw/boards.h"
#include "hw/nvram/fw_cfg.h"
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
@ -17,4 +18,10 @@
#define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
FWCfgState *fw_cfg_arch_create(MachineState *ms,
uint16_t boot_cpus,
uint16_t apic_id_limit);
void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg);
void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg);
#endif

204
hw/i386/pc.c
View File

@ -87,6 +87,8 @@
#include "sysemu/replay.h"
#include "qapi/qmp/qerror.h"
#include "config-devices.h"
#include "e820_memory_layout.h"
#include "fw_cfg.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@ -98,22 +100,6 @@
#define DPRINTF(fmt, ...)
#endif
#define E820_NR_ENTRIES 16
struct e820_entry {
uint64_t address;
uint64_t length;
uint32_t type;
} QEMU_PACKED __attribute((__aligned__(4)));
struct e820_table {
uint32_t count;
struct e820_entry entry[E820_NR_ENTRIES];
} QEMU_PACKED __attribute((__aligned__(4)));
static struct e820_table e820_reserve;
static struct e820_entry *e820_table;
static unsigned e820_entries;
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
/* Physical Address of PVH entry point read from kernel ELF NOTE */
@ -880,50 +866,6 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
x86_cpu_set_a20(cpu, level);
}
int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
{
int index = le32_to_cpu(e820_reserve.count);
struct e820_entry *entry;
if (type != E820_RAM) {
/* old FW_CFG_E820_TABLE entry -- reservations only */
if (index >= E820_NR_ENTRIES) {
return -EBUSY;
}
entry = &e820_reserve.entry[index++];
entry->address = cpu_to_le64(address);
entry->length = cpu_to_le64(length);
entry->type = cpu_to_le32(type);
e820_reserve.count = cpu_to_le32(index);
}
/* new "etc/e820" file -- include ram too */
e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
e820_table[e820_entries].address = cpu_to_le64(address);
e820_table[e820_entries].length = cpu_to_le64(length);
e820_table[e820_entries].type = cpu_to_le32(type);
e820_entries++;
return e820_entries;
}
int e820_get_num_entries(void)
{
return e820_entries;
}
bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
{
if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
*address = le64_to_cpu(e820_table[idx].address);
*length = le64_to_cpu(e820_table[idx].length);
return true;
}
return false;
}
/* Calculates initial APIC ID for a specific CPU index
*
* Currently we need to be able to calculate the APIC ID from the CPU index
@ -953,108 +895,6 @@ static uint32_t x86_cpu_apic_id_from_index(PCMachineState *pcms,
}
}
static void pc_build_smbios(PCMachineState *pcms)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
struct smbios_phys_mem_area *mem_array;
unsigned i, array_count;
MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
smbios_tables = smbios_get_table_legacy(ms, &smbios_tables_len);
if (smbios_tables) {
fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES,
smbios_tables, smbios_tables_len);
}
/* build the array of physical mem area from e820 table */
mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
uint64_t addr, len;
if (e820_get_entry(i, E820_RAM, &addr, &len)) {
mem_array[array_count].address = addr;
mem_array[array_count].length = len;
array_count++;
}
}
smbios_get_tables(ms, mem_array, array_count,
&smbios_tables, &smbios_tables_len,
&smbios_anchor, &smbios_anchor_len);
g_free(mem_array);
if (smbios_anchor) {
fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-tables",
smbios_tables, smbios_tables_len);
fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-anchor",
smbios_anchor, smbios_anchor_len);
}
}
static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
int i;
const CPUArchIdList *cpus;
MachineClass *mc = MACHINE_GET_CLASS(pcms);
MachineState *ms = MACHINE(pcms);
int nb_numa_nodes = ms->numa_state->num_nodes;
fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
/* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
*
* For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
* building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
* that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
* for CPU hotplug also uses APIC ID and not "CPU index".
* This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
* but the "limit to the APIC ID values SeaBIOS may see".
*
* So for compatibility reasons with old BIOSes we are stuck with
* "etc/max-cpus" actually being apic_id_limit
*/
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
acpi_tables, acpi_tables_len);
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
sizeof(struct e820_entry) * e820_entries);
fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
/* allocate memory for the NUMA channel: one (64bit) word for the number
* of nodes, one word for each VCPU->node and one word for each node to
* hold the amount of memory.
*/
numa_fw_cfg = g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nodes);
numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
cpus = mc->possible_cpu_arch_ids(MACHINE(pcms));
for (i = 0; i < cpus->len; i++) {
unsigned int apic_id = cpus->cpus[i].arch_id;
assert(apic_id < pcms->apic_id_limit);
numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
}
for (i = 0; i < nb_numa_nodes; i++) {
numa_fw_cfg[pcms->apic_id_limit + 1 + i] =
cpu_to_le64(ms->numa_state->nodes[i].node_mem);
}
fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
(1 + pcms->apic_id_limit + nb_numa_nodes) *
sizeof(*numa_fw_cfg));
return fw_cfg;
}
static long get_file_size(FILE *f)
{
long where, size;
@ -1672,7 +1512,7 @@ void pc_cpus_init(PCMachineState *pcms)
* Limit for the APIC ID value, so that all
* CPU APIC IDs are < pcms->apic_id_limit.
*
* This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
* This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
*/
pcms->apic_id_limit = x86_cpu_apic_id_from_index(pcms,
ms->smp.max_cpus - 1) + 1;
@ -1682,35 +1522,6 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
static void pc_build_feature_control_file(PCMachineState *pcms)
{
MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
CPUX86State *env = &cpu->env;
uint32_t unused, ecx, edx;
uint64_t feature_control_bits = 0;
uint64_t *val;
cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
if (ecx & CPUID_EXT_VMX) {
feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
}
if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
(CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
(env->mcg_cap & MCG_LMCE_P)) {
feature_control_bits |= FEATURE_CONTROL_LMCE;
}
if (!feature_control_bits) {
return;
}
val = g_malloc(sizeof(*val));
*val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
}
static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)
{
if (cpus_count > 0xff) {
@ -1753,8 +1564,8 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
pc_build_smbios(pcms);
pc_build_feature_control_file(pcms);
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
@ -1831,6 +1642,7 @@ void pc_memory_init(PCMachineState *pcms,
MemoryRegion *ram_below_4g, *ram_above_4g;
FWCfgState *fw_cfg;
MachineState *machine = MACHINE(pcms);
MachineClass *mc = MACHINE_GET_CLASS(machine);
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
assert(machine->ram_size == pcms->below_4g_mem_size +
@ -1864,7 +1676,6 @@ void pc_memory_init(PCMachineState *pcms,
if (!pcmc->has_reserved_memory &&
(machine->ram_slots ||
(machine->maxram_size > machine->ram_size))) {
MachineClass *mc = MACHINE_GET_CLASS(machine);
error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
mc->name);
@ -1927,7 +1738,8 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
fw_cfg = bochs_bios_init(&address_space_memory, pcms);
fw_cfg = fw_cfg_arch_create(machine,
pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);

19
include/exec/memory.h
View File

@ -2201,8 +2201,25 @@ address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
}
}
#ifdef NEED_CPU_H
/* enum device_endian to MemOp. */
MemOp devend_memop(enum device_endian end);
static inline MemOp devend_memop(enum device_endian end)
{
QEMU_BUILD_BUG_ON(DEVICE_HOST_ENDIAN != DEVICE_LITTLE_ENDIAN &&
DEVICE_HOST_ENDIAN != DEVICE_BIG_ENDIAN);
#if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
/* Swap if non-host endianness or native (target) endianness */
return (end == DEVICE_HOST_ENDIAN) ? 0 : MO_BSWAP;
#else
const int non_host_endianness =
DEVICE_LITTLE_ENDIAN ^ DEVICE_BIG_ENDIAN ^ DEVICE_HOST_ENDIAN;
/* In this case, native (target) endianness needs no swap. */
return (end == non_host_endianness) ? MO_BSWAP : 0;
#endif
}
#endif
#endif

5
include/hw/elf_ops.h
View File

@ -485,6 +485,11 @@ static int glue(load_elf, SZ)(const char *name, int fd,
}
}
if (mem_size > INT_MAX - total_size) {
ret = ELF_LOAD_TOO_BIG;
goto fail;
}
/* address_offset is hack for kernel images that are
linked at the wrong physical address. */
if (translate_fn) {

11
include/hw/i386/pc.h
View File

@ -291,17 +291,6 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
const CPUArchIdList *apic_ids, GArray *entry);
/* e820 types */
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
#define E820_UNUSABLE 5
int e820_add_entry(uint64_t, uint64_t, uint32_t);
int e820_get_num_entries(void);
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
extern GlobalProperty pc_compat_4_1[];
extern const size_t pc_compat_4_1_len;

1
include/hw/loader.h
View File

@ -89,6 +89,7 @@ int load_image_gzipped(const char *filename, hwaddr addr, uint64_t max_sz);
#define ELF_LOAD_NOT_ELF -2
#define ELF_LOAD_WRONG_ARCH -3
#define ELF_LOAD_WRONG_ENDIAN -4
#define ELF_LOAD_TOO_BIG -5
const char *load_elf_strerror(int error);
/** load_elf_ram_sym:

13
include/qemu/osdep.h
View File

@ -570,19 +570,6 @@ void qemu_set_tty_echo(int fd, bool echo);
void os_mem_prealloc(int fd, char *area, size_t sz, int smp_cpus,
Error **errp);
/**
* qemu_get_pmem_size:
* @filename: path to a pmem file
* @errp: pointer to a NULL-initialized error object
*
* Determine the size of a persistent memory file. Besides supporting files on
* DAX file systems, this function also supports Linux devdax character
* devices.
*
* Returns: the size or 0 on failure
*/
uint64_t qemu_get_pmem_size(const char *filename, Error **errp);
/**
* qemu_get_pid_name:
* @pid: pid of a process

19
include/qemu/thread.h
View File

@ -34,6 +34,8 @@ typedef void (*QemuRecMutexLockFunc)(QemuRecMutex *m, const char *f, int l);
typedef int (*QemuRecMutexTrylockFunc)(QemuRecMutex *m, const char *f, int l);
typedef void (*QemuCondWaitFunc)(QemuCond *c, QemuMutex *m, const char *f,
int l);
typedef bool (*QemuCondTimedWaitFunc)(QemuCond *c, QemuMutex *m, int ms,
const char *f, int l);
extern QemuMutexLockFunc qemu_bql_mutex_lock_func;
extern QemuMutexLockFunc qemu_mutex_lock_func;
@ -41,6 +43,7 @@ extern QemuMutexTrylockFunc qemu_mutex_trylock_func;
extern QemuRecMutexLockFunc qemu_rec_mutex_lock_func;
extern QemuRecMutexTrylockFunc qemu_rec_mutex_trylock_func;
extern QemuCondWaitFunc qemu_cond_wait_func;
extern QemuCondTimedWaitFunc qemu_cond_timedwait_func;
/* convenience macros to bypass the profiler */
#define qemu_mutex_lock__raw(m) \
@ -63,6 +66,8 @@ extern QemuCondWaitFunc qemu_cond_wait_func;
qemu_rec_mutex_trylock_impl(m, __FILE__, __LINE__);
#define qemu_cond_wait(c, m) \
qemu_cond_wait_impl(c, m, __FILE__, __LINE__);
#define qemu_cond_timedwait(c, m, ms) \
qemu_cond_wait_impl(c, m, ms, __FILE__, __LINE__);
#else
#define qemu_mutex_lock(m) ({ \
QemuMutexLockFunc _f = atomic_read(&qemu_mutex_lock_func); \
@ -89,6 +94,11 @@ extern QemuCondWaitFunc qemu_cond_wait_func;
QemuCondWaitFunc _f = atomic_read(&qemu_cond_wait_func); \
_f(c, m, __FILE__, __LINE__); \
})
#define qemu_cond_timedwait(c, m, ms) ({ \
QemuCondTimedWaitFunc _f = atomic_read(&qemu_cond_timedwait_func); \
_f(c, m, ms, __FILE__, __LINE__); \
})
#endif
#define qemu_mutex_unlock(mutex) \
@ -134,12 +144,21 @@ void qemu_cond_signal(QemuCond *cond);
void qemu_cond_broadcast(QemuCond *cond);
void qemu_cond_wait_impl(QemuCond *cond, QemuMutex *mutex,
const char *file, const int line);
bool qemu_cond_timedwait_impl(QemuCond *cond, QemuMutex *mutex, int ms,
const char *file, const int line);
static inline void (qemu_cond_wait)(QemuCond *cond, QemuMutex *mutex)
{
qemu_cond_wait(cond, mutex);
}
/* Returns true if timeout has not expired, and false otherwise */
static inline bool (qemu_cond_timedwait)(QemuCond *cond, QemuMutex *mutex,
int ms)
{
return qemu_cond_timedwait(cond, mutex, ms);
}
void qemu_sem_init(QemuSemaphore *sem, int init);
void qemu_sem_post(QemuSemaphore *sem);
void qemu_sem_wait(QemuSemaphore *sem);

4
linux-headers/linux/kvm.h
View File

@ -696,9 +696,11 @@ struct kvm_ioeventfd {
#define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0)
#define KVM_X86_DISABLE_EXITS_HLT (1 << 1)
#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
#define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3)
#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \
KVM_X86_DISABLE_EXITS_HLT | \
KVM_X86_DISABLE_EXITS_PAUSE)
KVM_X86_DISABLE_EXITS_PAUSE | \
KVM_X86_DISABLE_EXITS_CSTATE)
/* for KVM_ENABLE_CAP */
struct kvm_enable_cap {

18
memory.c
View File

@ -3267,21 +3267,3 @@ static void memory_register_types(void)
}
type_init(memory_register_types)
MemOp devend_memop(enum device_endian end)
{
static MemOp conv[] = {
[DEVICE_LITTLE_ENDIAN] = MO_LE,
[DEVICE_BIG_ENDIAN] = MO_BE,
[DEVICE_NATIVE_ENDIAN] = MO_TE,
[DEVICE_HOST_ENDIAN] = 0,
};
switch (end) {
case DEVICE_LITTLE_ENDIAN:
case DEVICE_BIG_ENDIAN:
case DEVICE_NATIVE_ENDIAN:
return conv[end];
default:
g_assert_not_reached();
}
}

4
qemu.nsi
View File

@ -119,7 +119,7 @@ Section "${PRODUCT} (required)"
File "${SRCDIR}\Changelog"
File "${SRCDIR}\COPYING"
File "${SRCDIR}\COPYING.LIB"
File "${SRCDIR}\README"
File "${SRCDIR}\README.rst"
File "${SRCDIR}\VERSION"
File "${BINDIR}\*.bmp"
@ -211,7 +211,7 @@ Section "Uninstall"
Delete "$INSTDIR\Changelog"
Delete "$INSTDIR\COPYING"
Delete "$INSTDIR\COPYING.LIB"
Delete "$INSTDIR\README"
Delete "$INSTDIR\README.rst"
Delete "$INSTDIR\VERSION"
Delete "$INSTDIR\*.bmp"
Delete "$INSTDIR\*.bin"

4
target/i386/kvm.c
View File

@ -41,6 +41,7 @@
#include "hw/i386/apic-msidef.h"
#include "hw/i386/intel_iommu.h"
#include "hw/i386/x86-iommu.h"
#include "hw/i386/e820_memory_layout.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
@ -2076,7 +2077,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
if (disable_exits) {
disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT |
KVM_X86_DISABLE_EXITS_HLT |
KVM_X86_DISABLE_EXITS_PAUSE);
KVM_X86_DISABLE_EXITS_PAUSE |
KVM_X86_DISABLE_EXITS_CSTATE);
}
ret = kvm_vm_enable_cap(s, KVM_CAP_X86_DISABLE_EXITS, 0,

44
tests/test-char.c
View File

@ -1355,6 +1355,18 @@ static void char_hotswap_test(void)
g_free(chr_args);
}
static SocketAddress tcpaddr = {
.type = SOCKET_ADDRESS_TYPE_INET,
.u.inet.host = (char *)"127.0.0.1",
.u.inet.port = (char *)"0",
};
#ifndef WIN32
static SocketAddress unixaddr = {
.type = SOCKET_ADDRESS_TYPE_UNIX,
.u.q_unix.path = (char *)"test-char.sock",
};
#endif
int main(int argc, char **argv)
{
bool has_ipv4, has_ipv6;
@ -1390,26 +1402,14 @@ int main(int argc, char **argv)
g_test_add_func("/char/file-fifo", char_file_fifo_test);
#endif
SocketAddress tcpaddr = {
.type = SOCKET_ADDRESS_TYPE_INET,
.u.inet.host = (char *)"127.0.0.1",
.u.inet.port = (char *)"0",
};
#ifndef WIN32
SocketAddress unixaddr = {
.type = SOCKET_ADDRESS_TYPE_UNIX,
.u.q_unix.path = (char *)"test-char.sock",
};
#endif
#define SOCKET_SERVER_TEST(name, addr) \
CharSocketServerTestConfig server1 ## name = \
static CharSocketServerTestConfig server1 ## name = \
{ addr, false, false }; \
CharSocketServerTestConfig server2 ## name = \
static CharSocketServerTestConfig server2 ## name = \
{ addr, true, false }; \
CharSocketServerTestConfig server3 ## name = \
static CharSocketServerTestConfig server3 ## name = \
{ addr, false, true }; \
CharSocketServerTestConfig server4 ## name = \
static CharSocketServerTestConfig server4 ## name = \
{ addr, true, true }; \
g_test_add_data_func("/char/socket/server/mainloop/" # name, \
&server1 ##name, char_socket_server_test); \
@ -1421,17 +1421,17 @@ int main(int argc, char **argv)
&server4 ##name, char_socket_server_test)
#define SOCKET_CLIENT_TEST(name, addr) \
CharSocketClientTestConfig client1 ## name = \
static CharSocketClientTestConfig client1 ## name = \
{ addr, NULL, false, false }; \
CharSocketClientTestConfig client2 ## name = \
static CharSocketClientTestConfig client2 ## name = \
{ addr, NULL, true, false }; \
CharSocketClientTestConfig client3 ## name = \
static CharSocketClientTestConfig client3 ## name = \
{ addr, ",reconnect=1", false }; \
CharSocketClientTestConfig client4 ## name = \
static CharSocketClientTestConfig client4 ## name = \
{ addr, ",reconnect=1", true }; \
CharSocketClientTestConfig client5 ## name = \
static CharSocketClientTestConfig client5 ## name = \
{ addr, NULL, false, true }; \
CharSocketClientTestConfig client6 ## name = \
static CharSocketClientTestConfig client6 ## name = \
{ addr, NULL, true, true }; \
g_test_add_data_func("/char/socket/client/mainloop/" # name, \
&client1 ##name, char_socket_client_test); \

54
util/oslib-posix.c
View File

@ -514,60 +514,6 @@ void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus,
}
}
uint64_t qemu_get_pmem_size(const char *filename, Error **errp)
{
struct stat st;
if (stat(filename, &st) < 0) {
error_setg(errp, "unable to stat pmem file \"%s\"", filename);
return 0;
}
#if defined(__linux__)
/* Special handling for devdax character devices */
if (S_ISCHR(st.st_mode)) {
char *subsystem_path = NULL;
char *subsystem = NULL;
char *size_path = NULL;
char *size_str = NULL;
uint64_t ret = 0;
subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
major(st.st_rdev), minor(st.st_rdev));
subsystem = g_file_read_link(subsystem_path, NULL);
if (!subsystem) {
error_setg(errp, "unable to read subsystem for pmem file \"%s\"",
filename);
goto devdax_err;
}
if (!g_str_has_suffix(subsystem, "/dax")) {
error_setg(errp, "pmem file \"%s\" is not a dax device", filename);
goto devdax_err;
}
size_path = g_strdup_printf("/sys/dev/char/%d:%d/size",
major(st.st_rdev), minor(st.st_rdev));
if (!g_file_get_contents(size_path, &size_str, NULL, NULL)) {
error_setg(errp, "unable to read size for pmem file \"%s\"",
size_path);
goto devdax_err;
}
ret = g_ascii_strtoull(size_str, NULL, 0);
devdax_err:
g_free(size_str);
g_free(size_path);
g_free(subsystem);
g_free(subsystem_path);
return ret;
}
#endif /* defined(__linux__) */
return st.st_size;
}
char *qemu_get_pid_name(pid_t pid)
{
char *name = NULL;

6
util/oslib-win32.c
View File

@ -562,12 +562,6 @@ void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus,
}
}
uint64_t qemu_get_pmem_size(const char *filename, Error **errp)
{
error_setg(errp, "pmem support not available");
return 0;
}
char *qemu_get_pid_name(pid_t pid)
{
/* XXX Implement me */

41
util/qemu-thread-posix.c
View File

@ -36,6 +36,18 @@ static void error_exit(int err, const char *msg)
abort();
}
static void compute_abs_deadline(struct timespec *ts, int ms)
{
struct timeval tv;
gettimeofday(&tv, NULL);
ts->tv_nsec = tv.tv_usec * 1000 + (ms % 1000) * 1000000;
ts->tv_sec = tv.tv_sec + ms / 1000;
if (ts->tv_nsec >= 1000000000) {
ts->tv_sec++;
ts->tv_nsec -= 1000000000;
}
}
void qemu_mutex_init(QemuMutex *mutex)
{
int err;
@ -164,6 +176,23 @@ void qemu_cond_wait_impl(QemuCond *cond, QemuMutex *mutex, const char *file, con
error_exit(err, __func__);
}
bool qemu_cond_timedwait_impl(QemuCond *cond, QemuMutex *mutex, int ms,
const char *file, const int line)
{
int err;
struct timespec ts;
assert(cond->initialized);
trace_qemu_mutex_unlock(mutex, file, line);
compute_abs_deadline(&ts, ms);
err = pthread_cond_timedwait(&cond->cond, &mutex->lock, &ts);
trace_qemu_mutex_locked(mutex, file, line);
if (err && err != ETIMEDOUT) {
error_exit(err, __func__);
}
return err != ETIMEDOUT;
}
void qemu_sem_init(QemuSemaphore *sem, int init)
{
int rc;
@ -238,18 +267,6 @@ void qemu_sem_post(QemuSemaphore *sem)
#endif
}
static void compute_abs_deadline(struct timespec *ts, int ms)
{
struct timeval tv;
gettimeofday(&tv, NULL);
ts->tv_nsec = tv.tv_usec * 1000 + (ms % 1000) * 1000000;
ts->tv_sec = tv.tv_sec + ms / 1000;
if (ts->tv_nsec >= 1000000000) {
ts->tv_sec++;
ts->tv_nsec -= 1000000000;
}
}
int qemu_sem_timedwait(QemuSemaphore *sem, int ms)
{
int rc;

17
util/qemu-thread-win32.c
View File

@ -145,6 +145,23 @@ void qemu_cond_wait_impl(QemuCond *cond, QemuMutex *mutex, const char *file, con
qemu_mutex_post_lock(mutex, file, line);
}
bool qemu_cond_timedwait_impl(QemuCond *cond, QemuMutex *mutex, int ms,
const char *file, const int line)
{
int rc = 0;
assert(cond->initialized);
trace_qemu_mutex_unlock(mutex, file, line);
if (!SleepConditionVariableSRW(&cond->var, &mutex->lock, ms, 0)) {
rc = GetLastError();
}
trace_qemu_mutex_locked(mutex, file, line);
if (rc && rc != ERROR_TIMEOUT) {
error_exit(rc, __func__);
}
return rc != ERROR_TIMEOUT;
}
void qemu_sem_init(QemuSemaphore *sem, int init)
{
/* Manual reset. */

20
util/qsp.c
View File

@ -131,6 +131,7 @@ QemuRecMutexLockFunc qemu_rec_mutex_lock_func = qemu_rec_mutex_lock_impl;
QemuRecMutexTrylockFunc qemu_rec_mutex_trylock_func =
qemu_rec_mutex_trylock_impl;
QemuCondWaitFunc qemu_cond_wait_func = qemu_cond_wait_impl;
QemuCondTimedWaitFunc qemu_cond_timedwait_func = qemu_cond_timedwait_impl;
/*
* It pays off to _not_ hash callsite->file; hashing a string is slow, and
@ -412,6 +413,23 @@ qsp_cond_wait(QemuCond *cond, QemuMutex *mutex, const char *file, int line)
qsp_entry_record(e, t1 - t0);
}
static bool
qsp_cond_timedwait(QemuCond *cond, QemuMutex *mutex, int ms,
const char *file, int line)
{
QSPEntry *e;
int64_t t0, t1;
bool ret;
t0 = get_clock();
ret = qemu_cond_timedwait_impl(cond, mutex, ms, file, line);
t1 = get_clock();
e = qsp_entry_get(cond, file, line, QSP_CONDVAR);
qsp_entry_record(e, t1 - t0);
return ret;
}
bool qsp_is_enabled(void)
{
return atomic_read(&qemu_mutex_lock_func) == qsp_mutex_lock;
@ -425,6 +443,7 @@ void qsp_enable(void)
atomic_set(&qemu_rec_mutex_lock_func, qsp_rec_mutex_lock);
atomic_set(&qemu_rec_mutex_trylock_func, qsp_rec_mutex_trylock);
atomic_set(&qemu_cond_wait_func, qsp_cond_wait);
atomic_set(&qemu_cond_timedwait_func, qsp_cond_timedwait);
}
void qsp_disable(void)
@ -435,6 +454,7 @@ void qsp_disable(void)
atomic_set(&qemu_rec_mutex_lock_func, qemu_rec_mutex_lock_impl);
atomic_set(&qemu_rec_mutex_trylock_func, qemu_rec_mutex_trylock_impl);
atomic_set(&qemu_cond_wait_func, qemu_cond_wait_impl);
atomic_set(&qemu_cond_timedwait_func, qemu_cond_timedwait_impl);
}
static gint qsp_tree_cmp(gconstpointer ap, gconstpointer bp, gpointer up)