target/ppc: Move 601 hflags adjustment to hreg_compute_hflags
Keep all hflags computation in one place, as this will be especially important later. Introduce a new POWERPC_FLAG_HID0_LE bit to indicate when LE should be taken from HID0. This appears to be set if and only if POWERPC_FLAG_RTC_CLK is set, but we're not short of bits and having both names will avoid confusion. Note that this was the only user of hflags_nmsr, so we can perform a straight assignment rather than mask and set. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210315184615.1985590-3-richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -581,6 +581,8 @@ enum {
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POWERPC_FLAG_TM = 0x00100000,
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POWERPC_FLAG_TM = 0x00100000,
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/* Has SCV (ISA 3.00) */
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/* Has SCV (ISA 3.00) */
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POWERPC_FLAG_SCV = 0x00200000,
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POWERPC_FLAG_SCV = 0x00200000,
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/* Has HID0 for LE bit (601) */
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POWERPC_FLAG_HID0_LE = 0x00400000,
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};
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};
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/*****************************************************************************/
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/*****************************************************************************/
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@ -96,8 +96,17 @@ void hreg_compute_hflags(CPUPPCState *env)
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hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB;
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hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB;
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hreg_compute_mem_idx(env);
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hreg_compute_mem_idx(env);
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env->hflags = env->msr & hflags_mask;
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env->hflags = env->msr & hflags_mask;
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/* Merge with hflags coming from other registers */
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env->hflags |= env->hflags_nmsr;
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if (env->flags & POWERPC_FLAG_HID0_LE) {
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/*
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* Note that MSR_LE is not set in env->msr_mask for this cpu,
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* and so will never be set in msr or hflags at this point.
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*/
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uint32_t le = extract32(env->spr[SPR_HID0], 3, 1);
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env->hflags |= le << MSR_LE;
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/* Retain for backward compatibility with migration. */
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env->hflags_nmsr = le << MSR_LE;
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}
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}
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}
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void cpu_interrupt_exittb(CPUState *cs)
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void cpu_interrupt_exittb(CPUState *cs)
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@ -194,16 +194,14 @@ void helper_store_hid0_601(CPUPPCState *env, target_ulong val)
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target_ulong hid0;
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target_ulong hid0;
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hid0 = env->spr[SPR_HID0];
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hid0 = env->spr[SPR_HID0];
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env->spr[SPR_HID0] = (uint32_t)val;
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if ((val ^ hid0) & 0x00000008) {
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if ((val ^ hid0) & 0x00000008) {
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/* Change current endianness */
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/* Change current endianness */
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env->hflags &= ~(1 << MSR_LE);
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hreg_compute_hflags(env);
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env->hflags_nmsr &= ~(1 << MSR_LE);
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env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE);
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env->hflags |= env->hflags_nmsr;
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qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__,
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qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__,
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val & 0x8 ? 'l' : 'b', env->hflags);
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val & 0x8 ? 'l' : 'b', env->hflags);
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}
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}
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env->spr[SPR_HID0] = (uint32_t)val;
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}
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}
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void helper_store_403_pbr(CPUPPCState *env, uint32_t num, target_ulong value)
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void helper_store_403_pbr(CPUPPCState *env, uint32_t num, target_ulong value)
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@ -5441,7 +5441,7 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data)
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pcc->excp_model = POWERPC_EXCP_601;
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pcc->excp_model = POWERPC_EXCP_601;
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pcc->bus_model = PPC_FLAGS_INPUT_6xx;
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pcc->bus_model = PPC_FLAGS_INPUT_6xx;
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pcc->bfd_mach = bfd_mach_ppc_601;
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pcc->bfd_mach = bfd_mach_ppc_601;
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pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK;
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pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE;
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}
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}
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#define POWERPC_MSRR_601v (0x0000000000001040ULL)
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#define POWERPC_MSRR_601v (0x0000000000001040ULL)
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@ -5485,7 +5485,7 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data)
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#endif
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#endif
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pcc->bus_model = PPC_FLAGS_INPUT_6xx;
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pcc->bus_model = PPC_FLAGS_INPUT_6xx;
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pcc->bfd_mach = bfd_mach_ppc_601;
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pcc->bfd_mach = bfd_mach_ppc_601;
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pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK;
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pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_HID0_LE;
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}
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}
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static void init_proc_602(CPUPPCState *env)
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static void init_proc_602(CPUPPCState *env)
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