mmu-hash64: Clean up ppc_hash64_htab_lookup()
This patch makes a general cleanup of the address mangling logic in ppc_hash64_htab_lookup(). In particular it now avoids repeatedly switching on the segment size. The lack of SLB and multiple segment sizes on 32-bit means an analogous cleanup is not needed there. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -379,31 +379,29 @@ static hwaddr ppc_hash64_htab_lookup(CPUPPCState *env,
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ppc_hash_pte64_t *pte)
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{
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hwaddr pteg_off, pte_offset;
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uint64_t vsid, pageaddr, ptem;
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hwaddr hash;
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int segment_bits, target_page_bits;
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uint64_t vsid, epnshift, epnmask, epn, ptem;
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if (slb->vsid & SLB_VSID_B) {
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vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT_1T;
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segment_bits = 40;
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} else {
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vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT;
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segment_bits = 28;
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}
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target_page_bits = (slb->vsid & SLB_VSID_L)
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/* Page size according to the SLB, which we use to generate the
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* EPN for hash table lookup.. When we implement more recent MMU
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* extensions this might be different from the actual page size
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* encoded in the PTE */
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epnshift = (slb->vsid & SLB_VSID_L)
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? TARGET_PAGE_BITS_16M : TARGET_PAGE_BITS;
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epnmask = ~((1ULL << epnshift) - 1);
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pageaddr = eaddr & ((1ULL << segment_bits)
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- (1ULL << target_page_bits));
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if (slb->vsid & SLB_VSID_B) {
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hash = vsid ^ (vsid << 25) ^ (pageaddr >> target_page_bits);
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/* 1TB segment */
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vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT_1T;
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epn = (eaddr & ~SEGMENT_MASK_1T) & epnmask;
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hash = vsid ^ (vsid << 25) ^ (epn >> epnshift);
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} else {
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hash = vsid ^ (pageaddr >> target_page_bits);
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/* 256M segment */
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vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT;
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epn = (eaddr & ~SEGMENT_MASK_256M) & epnmask;
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hash = vsid ^ (epn >> epnshift);
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}
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/* Only 5 bits of the page index are used in the AVPN */
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ptem = (slb->vsid & SLB_VSID_PTEM) |
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((pageaddr >> 16) & ((1ULL << segment_bits) - 0x80));
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ptem = (slb->vsid & SLB_VSID_PTEM) | ((epn >> 16) & HPTE64_V_AVPN);
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/* Page address translation */
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LOG_MMU("htab_base " TARGET_FMT_plx " htab_mask " TARGET_FMT_plx
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