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target/riscv: Correct SXL return value for RV32 in RV64 QEMU

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Ensure that riscv_cpu_sxl returns MXL_RV32 when runningRV32 in an
RV64 QEMU.

Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Fixes: 05e6ca5e15 ("target/riscv: Ignore reserved bits in PTE for RV64")
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240919055048.562-4-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit 929e4277c1)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
TANG Tiancheng 2024-09-19 13:50:43 +08:00 committed by Michael Tokarev
parent 0fdeb6f156
commit 17eedf2aea
1 changed files with 4 additions and 1 deletions
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5
target/riscv/cpu.h
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@ -647,8 +647,11 @@ static inline RISCVMXL riscv_cpu_sxl(CPURISCVState *env)
#ifdef CONFIG_USER_ONLY
return env->misa_mxl;
#else
return get_field(env->mstatus, MSTATUS64_SXL);
if (env->misa_mxl != MXL_RV32) {
return get_field(env->mstatus, MSTATUS64_SXL);
}
#endif
return MXL_RV32;
}
#endif