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hw/arm: Use memory_region_init_rom() with read-only regions

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This commit was produced with the Coccinelle script
scripts/coccinelle/memory-region-housekeeping.cocci.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2020-02-24 19:50:18 +01:00 committed by Paolo Bonzini
parent d3ec684d70
commit 16260006ac
7 changed files with 8 additions and 16 deletions
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3
hw/arm/exynos4210.c
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@ -311,9 +311,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
&s->chipid_mem); &s->chipid_mem);
/* Internal ROM */ /* Internal ROM */
memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom", memory_region_init_rom(&s->irom_mem, NULL, "exynos4210.irom",
EXYNOS4210_IROM_SIZE, &error_fatal); EXYNOS4210_IROM_SIZE, &error_fatal);
memory_region_set_readonly(&s->irom_mem, true);
memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR, memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR,
&s->irom_mem); &s->irom_mem);
/* mirror of iROM */ /* mirror of iROM */

3
hw/arm/mainstone.c
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@ -124,9 +124,8 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
/* Setup CPU & memory */ /* Setup CPU & memory */
mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size,
machine->cpu_type); machine->cpu_type);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM, memory_region_init_rom(rom, NULL, "mainstone.rom", MAINSTONE_ROM,
&error_fatal); &error_fatal);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom); memory_region_add_subregion(address_space_mem, 0, rom);
/* There are two 32MiB flash devices on the board */ /* There are two 32MiB flash devices on the board */

6
hw/arm/omap_sx1.c
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@ -131,9 +131,8 @@ static void sx1_init(MachineState *machine, const int version)
mpu = omap310_mpu_init(machine->ram, machine->cpu_type); mpu = omap310_mpu_init(machine->ram, machine->cpu_type);
/* External Flash (EMIFS) */ /* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size, memory_region_init_rom(flash, NULL, "omap_sx1.flash0-0", flash_size,
&error_fatal); &error_fatal);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
@ -167,9 +166,8 @@ static void sx1_init(MachineState *machine, const int version)
if ((version == 1) && if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
MemoryRegion *flash_1 = g_new(MemoryRegion, 1); MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", memory_region_init_rom(flash_1, NULL, "omap_sx1.flash1-0",
flash1_size, &error_fatal); flash1_size, &error_fatal);
memory_region_set_readonly(flash_1, true);
memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1); memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val, memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,

3
hw/arm/palm.c
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@ -213,9 +213,8 @@ static void palmte_init(MachineState *machine)
mpu = omap310_mpu_init(machine->ram, machine->cpu_type); mpu = omap310_mpu_init(machine->ram, machine->cpu_type);
/* External Flash (EMIFS) */ /* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "palmte.flash", flash_size, memory_region_init_rom(flash, NULL, "palmte.flash", flash_size,
&error_fatal); &error_fatal);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash); memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash);
memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, "palmte-cs0", memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, "palmte-cs0",

3
hw/arm/spitz.c
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@ -929,8 +929,7 @@ static void spitz_common_init(MachineState *machine,
sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom); memory_region_add_subregion(address_space_mem, 0, rom);
/* Setup peripherals */ /* Setup peripherals */

3
hw/arm/stellaris.c
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@ -1300,9 +1300,8 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board)
sram_size = ((board->dc0 >> 18) + 1) * 1024; sram_size = ((board->dc0 >> 18) + 1) * 1024;
/* Flash programming is done via the SCU, so pretend it is ROM. */ /* Flash programming is done via the SCU, so pretend it is ROM. */
memory_region_init_ram(flash, NULL, "stellaris.flash", flash_size, memory_region_init_rom(flash, NULL, "stellaris.flash", flash_size,
&error_fatal); &error_fatal);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(system_memory, 0, flash); memory_region_add_subregion(system_memory, 0, flash);
memory_region_init_ram(sram, NULL, "stellaris.sram", sram_size, memory_region_init_ram(sram, NULL, "stellaris.sram", sram_size,

3
hw/arm/tosa.c
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@ -226,8 +226,7 @@ static void tosa_init(MachineState *machine)
mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size); mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); memory_region_init_rom(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom); memory_region_add_subregion(address_space_mem, 0, rom);
tmio = tc6393xb_init(address_space_mem, 0x10000000, tmio = tc6393xb_init(address_space_mem, 0x10000000,