dino: split declarations from dino.c into dino.h
This is to allow access to DinoState from outside dino.c. With the changes to the headers it is now possible to remove the duplicate definition for TYPE_DINO_PCI_HOST_BRIDGE from hppa_sys.h. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220504092600.10048-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland
parent
079e7ad989
commit
14e275efcb
111
hw/hppa/dino.c
111
hw/hppa/dino.c
@ -18,122 +18,13 @@
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_bus.h"
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#include "hw/qdev-properties.h"
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#include "dino.h"
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#include "migration/vmstate.h"
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#include "hppa_sys.h"
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#include "trace.h"
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#include "qom/object.h"
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#define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost"
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#define DINO_IAR0 0x004
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#define DINO_IODC 0x008
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#define DINO_IRR0 0x00C /* RO */
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#define DINO_IAR1 0x010
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#define DINO_IRR1 0x014 /* RO */
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#define DINO_IMR 0x018
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#define DINO_IPR 0x01C
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#define DINO_TOC_ADDR 0x020
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#define DINO_ICR 0x024
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#define DINO_ILR 0x028 /* RO */
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#define DINO_IO_COMMAND 0x030 /* WO */
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#define DINO_IO_STATUS 0x034 /* RO */
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#define DINO_IO_CONTROL 0x038
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#define DINO_IO_GSC_ERR_RESP 0x040 /* RO */
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#define DINO_IO_ERR_INFO 0x044 /* RO */
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#define DINO_IO_PCI_ERR_RESP 0x048 /* RO */
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#define DINO_IO_FBB_EN 0x05c
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#define DINO_IO_ADDR_EN 0x060
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#define DINO_PCI_CONFIG_ADDR 0x064
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#define DINO_PCI_CONFIG_DATA 0x068
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#define DINO_PCI_IO_DATA 0x06c
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#define DINO_PCI_MEM_DATA 0x070 /* Dino 3.x only */
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#define DINO_GSC2X_CONFIG 0x7b4 /* RO */
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#define DINO_GMASK 0x800
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#define DINO_PAMR 0x804
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#define DINO_PAPR 0x808
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#define DINO_DAMODE 0x80c
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#define DINO_PCICMD 0x810
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#define DINO_PCISTS 0x814 /* R/WC */
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#define DINO_MLTIM 0x81c
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#define DINO_BRDG_FEAT 0x820
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#define DINO_PCIROR 0x824
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#define DINO_PCIWOR 0x828
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#define DINO_TLTIM 0x830
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#define DINO_IRQS 11 /* bits 0-10 are architected */
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#define DINO_IRR_MASK 0x5ff /* only 10 bits are implemented */
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#define DINO_LOCAL_IRQS (DINO_IRQS + 1)
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#define DINO_MASK_IRQ(x) (1 << (x))
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#define PCIINTA 0x001
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#define PCIINTB 0x002
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#define PCIINTC 0x004
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#define PCIINTD 0x008
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#define PCIINTE 0x010
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#define PCIINTF 0x020
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#define GSCEXTINT 0x040
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/* #define xxx 0x080 - bit 7 is "default" */
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/* #define xxx 0x100 - bit 8 not used */
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/* #define xxx 0x200 - bit 9 not used */
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#define RS232INT 0x400
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#define DINO_MEM_CHUNK_SIZE (8 * MiB)
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OBJECT_DECLARE_SIMPLE_TYPE(DinoState, DINO_PCI_HOST_BRIDGE)
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#define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4)
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static const uint32_t reg800_keep_bits[DINO800_REGS] = {
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MAKE_64BIT_MASK(0, 1), /* GMASK */
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MAKE_64BIT_MASK(0, 7), /* PAMR */
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MAKE_64BIT_MASK(0, 7), /* PAPR */
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MAKE_64BIT_MASK(0, 8), /* DAMODE */
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MAKE_64BIT_MASK(0, 7), /* PCICMD */
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MAKE_64BIT_MASK(0, 9), /* PCISTS */
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MAKE_64BIT_MASK(0, 32), /* Undefined */
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MAKE_64BIT_MASK(0, 8), /* MLTIM */
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MAKE_64BIT_MASK(0, 30), /* BRDG_FEAT */
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MAKE_64BIT_MASK(0, 24), /* PCIROR */
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MAKE_64BIT_MASK(0, 22), /* PCIWOR */
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MAKE_64BIT_MASK(0, 32), /* Undocumented */
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MAKE_64BIT_MASK(0, 9), /* TLTIM */
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};
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struct DinoState {
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PCIHostState parent_obj;
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/*
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* PCI_CONFIG_ADDR is parent_obj.config_reg, via pci_host_conf_be_ops,
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* so that we can map PCI_CONFIG_DATA to pci_host_data_be_ops.
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*/
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uint32_t config_reg_dino; /* keep original copy, including 2 lowest bits */
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uint32_t iar0;
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uint32_t iar1;
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uint32_t imr;
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uint32_t ipr;
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uint32_t icr;
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uint32_t ilr;
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uint32_t io_fbb_en;
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uint32_t io_addr_en;
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uint32_t io_control;
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uint32_t toc_addr;
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uint32_t reg800[DINO800_REGS];
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MemoryRegion this_mem;
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MemoryRegion pci_mem;
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MemoryRegion pci_mem_alias[32];
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MemoryRegion *memory_as;
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AddressSpace bm_as;
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MemoryRegion bm;
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MemoryRegion bm_ram_alias;
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MemoryRegion bm_pci_alias;
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MemoryRegion bm_cpu_alias;
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};
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/*
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* Dino can forward memory accesses from the CPU in the range between
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* 0xf0800000 and 0xff000000 to the PCI bus.
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127
hw/hppa/dino.h
Normal file
127
hw/hppa/dino.h
Normal file
@ -0,0 +1,127 @@
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/*
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* HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines
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*
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* (C) 2017-2019 by Helge Deller <deller@gmx.de>
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*
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* This work is licensed under the GNU GPL license version 2 or later.
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*
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* Documentation available at:
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* https://parisc.wiki.kernel.org/images-parisc/9/91/Dino_ers.pdf
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* https://parisc.wiki.kernel.org/images-parisc/7/70/Dino_3_1_Errata.pdf
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*/
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#ifndef DINO_H
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#define DINO_H
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#include "hw/pci/pci_host.h"
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#define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost"
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OBJECT_DECLARE_SIMPLE_TYPE(DinoState, DINO_PCI_HOST_BRIDGE)
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#define DINO_IAR0 0x004
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#define DINO_IODC 0x008
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#define DINO_IRR0 0x00C /* RO */
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#define DINO_IAR1 0x010
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#define DINO_IRR1 0x014 /* RO */
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#define DINO_IMR 0x018
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#define DINO_IPR 0x01C
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#define DINO_TOC_ADDR 0x020
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#define DINO_ICR 0x024
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#define DINO_ILR 0x028 /* RO */
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#define DINO_IO_COMMAND 0x030 /* WO */
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#define DINO_IO_STATUS 0x034 /* RO */
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#define DINO_IO_CONTROL 0x038
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#define DINO_IO_GSC_ERR_RESP 0x040 /* RO */
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#define DINO_IO_ERR_INFO 0x044 /* RO */
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#define DINO_IO_PCI_ERR_RESP 0x048 /* RO */
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#define DINO_IO_FBB_EN 0x05c
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#define DINO_IO_ADDR_EN 0x060
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#define DINO_PCI_CONFIG_ADDR 0x064
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#define DINO_PCI_CONFIG_DATA 0x068
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#define DINO_PCI_IO_DATA 0x06c
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#define DINO_PCI_MEM_DATA 0x070 /* Dino 3.x only */
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#define DINO_GSC2X_CONFIG 0x7b4 /* RO */
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#define DINO_GMASK 0x800
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#define DINO_PAMR 0x804
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#define DINO_PAPR 0x808
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#define DINO_DAMODE 0x80c
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#define DINO_PCICMD 0x810
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#define DINO_PCISTS 0x814 /* R/WC */
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#define DINO_MLTIM 0x81c
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#define DINO_BRDG_FEAT 0x820
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#define DINO_PCIROR 0x824
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#define DINO_PCIWOR 0x828
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#define DINO_TLTIM 0x830
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#define DINO_IRQS 11 /* bits 0-10 are architected */
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#define DINO_IRR_MASK 0x5ff /* only 10 bits are implemented */
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#define DINO_LOCAL_IRQS (DINO_IRQS + 1)
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#define DINO_MASK_IRQ(x) (1 << (x))
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#define PCIINTA 0x001
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#define PCIINTB 0x002
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#define PCIINTC 0x004
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#define PCIINTD 0x008
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#define PCIINTE 0x010
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#define PCIINTF 0x020
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#define GSCEXTINT 0x040
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/* #define xxx 0x080 - bit 7 is "default" */
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/* #define xxx 0x100 - bit 8 not used */
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/* #define xxx 0x200 - bit 9 not used */
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#define RS232INT 0x400
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#define DINO_MEM_CHUNK_SIZE (8 * MiB)
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#define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4)
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static const uint32_t reg800_keep_bits[DINO800_REGS] = {
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MAKE_64BIT_MASK(0, 1), /* GMASK */
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MAKE_64BIT_MASK(0, 7), /* PAMR */
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MAKE_64BIT_MASK(0, 7), /* PAPR */
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MAKE_64BIT_MASK(0, 8), /* DAMODE */
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MAKE_64BIT_MASK(0, 7), /* PCICMD */
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MAKE_64BIT_MASK(0, 9), /* PCISTS */
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MAKE_64BIT_MASK(0, 32), /* Undefined */
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MAKE_64BIT_MASK(0, 8), /* MLTIM */
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MAKE_64BIT_MASK(0, 30), /* BRDG_FEAT */
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MAKE_64BIT_MASK(0, 24), /* PCIROR */
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MAKE_64BIT_MASK(0, 22), /* PCIWOR */
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MAKE_64BIT_MASK(0, 32), /* Undocumented */
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MAKE_64BIT_MASK(0, 9), /* TLTIM */
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};
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struct DinoState {
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PCIHostState parent_obj;
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/*
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* PCI_CONFIG_ADDR is parent_obj.config_reg, via pci_host_conf_be_ops,
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* so that we can map PCI_CONFIG_DATA to pci_host_data_be_ops.
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*/
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uint32_t config_reg_dino; /* keep original copy, including 2 lowest bits */
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uint32_t iar0;
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uint32_t iar1;
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uint32_t imr;
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uint32_t ipr;
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uint32_t icr;
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uint32_t ilr;
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uint32_t io_fbb_en;
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uint32_t io_addr_en;
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uint32_t io_control;
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uint32_t toc_addr;
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uint32_t reg800[DINO800_REGS];
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MemoryRegion this_mem;
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MemoryRegion pci_mem;
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MemoryRegion pci_mem_alias[32];
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MemoryRegion *memory_as;
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AddressSpace bm_as;
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MemoryRegion bm;
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MemoryRegion bm_ram_alias;
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MemoryRegion bm_pci_alias;
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MemoryRegion bm_cpu_alias;
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};
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#endif
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@ -14,8 +14,6 @@ PCIBus *dino_init(MemoryRegion *, qemu_irq *, qemu_irq *);
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DeviceState *lasi_init(MemoryRegion *);
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#define enable_lasi_lan() 0
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#define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost"
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/* hppa_pci.c. */
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extern const MemoryRegionOps hppa_pci_ignore_ops;
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extern const MemoryRegionOps hppa_pci_conf1_ops;
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