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hw/misc: pfsoc: add fabric clocks to ioscb

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On PolarFire SoC, some peripherals (eg the PCI root port) are clocked by
"Clock Conditioning Circuitry" in the FPGA. The specific clock depends
on the FPGA bitstream & can be locked to one particular {D,P}LL - in the
Icicle Kit Reference Design v2022.09 or later this is/will be the case.

Linux v6.1+ will have a driver for this peripheral and devicetrees that
previously relied on "fixed-frequency" clock nodes have been switched
over to clock-controller nodes. The IOSCB region is represented in QEMU,
but the specific region of it that the CCCs occupy has not so v6.1-rcN
kernels fail to boot in QEMU.

Add the regions as unimplemented so that the status-quo in terms of boot
is maintained.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Message-Id: <20221117225518.4102575-2-conor@kernel.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Conor Dooley 2022-11-17 22:55:16 +00:00 committed by Alistair Francis
parent bc7dca13b7
commit 13cd1d6eaf
2 changed files with 7 additions and 0 deletions
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6
hw/misc/mchp_pfsoc_ioscb.c
View File

@ -33,6 +33,7 @@
*/
#define IOSCB_WHOLE_REG_SIZE 0x10000000
#define IOSCB_SUBMOD_REG_SIZE 0x1000
#define IOSCB_CCC_REG_SIZE 0x2000000
/*
* There are many sub-modules in the IOSCB module.
@ -45,6 +46,7 @@
#define IOSCB_LANE23_BASE 0x06510000
#define IOSCB_CTRL_BASE 0x07020000
#define IOSCB_CFG_BASE 0x07080000
#define IOSCB_CCC_BASE 0x08000000
#define IOSCB_PLL_MSS_BASE 0x0E001000
#define IOSCB_CFM_MSS_BASE 0x0E002000
#define IOSCB_PLL_DDR_BASE 0x0E010000
@ -168,6 +170,10 @@ static void mchp_pfsoc_ioscb_realize(DeviceState *dev, Error **errp)
"mchp.pfsoc.ioscb.cfg", IOSCB_SUBMOD_REG_SIZE);
memory_region_add_subregion(&s->container, IOSCB_CFG_BASE, &s->cfg);
memory_region_init_io(&s->ccc, OBJECT(s), &mchp_pfsoc_dummy_ops, s,
"mchp.pfsoc.ioscb.ccc", IOSCB_CCC_REG_SIZE);
memory_region_add_subregion(&s->container, IOSCB_CCC_BASE, &s->ccc);
memory_region_init_io(&s->pll_mss, OBJECT(s), &mchp_pfsoc_pll_ops, s,
"mchp.pfsoc.ioscb.pll_mss", IOSCB_SUBMOD_REG_SIZE);
memory_region_add_subregion(&s->container, IOSCB_PLL_MSS_BASE, &s->pll_mss);

1
include/hw/misc/mchp_pfsoc_ioscb.h
View File

@ -30,6 +30,7 @@ typedef struct MchpPfSoCIoscbState {
MemoryRegion lane23;
MemoryRegion ctrl;
MemoryRegion cfg;
MemoryRegion ccc;
MemoryRegion pll_mss;
MemoryRegion cfm_mss;
MemoryRegion pll_ddr;